Colleen J. O. Toole

Array ( [id] => 20101298 [patent_doc_number] => 20250231234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-17 [patent_title] => Latchup Detector and Clock Loss Detector [patent_app_type] => utility [patent_app_number] => 19/095150 [patent_app_country] => US [patent_app_date] => 2025-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2194 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19095150 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20072991 [patent_doc_number] => 20250211213 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-26 [patent_title] => PULSE CURRENT APPLICATION DEVICE AND CONTROL METHOD OF PULSE CURRENT APPLICATION DEVICE [patent_app_type] => utility [patent_app_number] => 18/930100 [patent_app_country] => US [patent_app_date] => 2024-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18930100 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20298409 [patent_doc_number] => 20250323652 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-16 [patent_title] => REDUCING NON-LINEARITY IN A DIGITAL-TO-TIME CONVERTER (DTC) WHEN AN INPUT CLOCK CHANGES BETWEEN LOWER AND HIGHER PERIODS [patent_app_type] => utility [patent_app_number] => 18/829350 [patent_app_country] => US [patent_app_date] => 2024-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2087 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18829350 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20589090 [patent_doc_number] => 20260074687 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-12 [patent_title] => METHODS AND SYSTEMS FOR REDUCING NOISE DURING SWITCH STATE TRANSITIONS [patent_app_type] => utility [patent_app_number] => 18/829165 [patent_app_country] => US [patent_app_date] => 2024-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5138 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -30 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18829165 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20291886 [patent_doc_number] => 20250317129 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-09 [patent_title] => CLOCK TRANSMISSION CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/822480 [patent_app_country] => US [patent_app_date] => 2024-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3543 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18822480 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20572971 [patent_doc_number] => 20260066900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-05 [patent_title] => LOW LEAKAGE MULTIPLEXER [patent_app_type] => utility [patent_app_number] => 18/820941 [patent_app_country] => US [patent_app_date] => 2024-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6000 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18820941 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20182801 [patent_doc_number] => 20250266759 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-21 [patent_title] => CHARGE PUMP, CHARGE PUMP SYSTEM, AND METHOD OF CONTROLLING A CHARGE PUMP [patent_app_type] => utility [patent_app_number] => 18/821508 [patent_app_country] => US [patent_app_date] => 2024-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2410 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18821508 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19647174 [patent_doc_number] => 20240421694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => DRIVING CIRCUIT, DRIVING SYSTEM AND POWER CONVERSION DEVICE [patent_app_type] => utility [patent_app_number] => 18/815088 [patent_app_country] => US [patent_app_date] => 2024-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8094 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18815088 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20558867 [patent_doc_number] => 20260058654 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-26 [patent_title] => POWER-THRU BOOSTER [patent_app_type] => utility [patent_app_number] => 18/813518 [patent_app_country] => US [patent_app_date] => 2024-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7829 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18813518 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19804838 [patent_doc_number] => 20250070763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => TOGGLE FLIP-FLOP AND COUNTER INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/812395 [patent_app_country] => US [patent_app_date] => 2024-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9332 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18812395 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20353425 [patent_doc_number] => 20250350277 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-13 [patent_title] => METHODS AND APPARATUS TO CONTROL A SLEW RATE OF DRIVER CIRCUITRY [patent_app_type] => utility [patent_app_number] => 18/811418 [patent_app_country] => US [patent_app_date] => 2024-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19889 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18811418 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20718670 [patent_doc_number] => 12633933 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-19 [patent_title] => Phase-locked loop circuit, phase error sign generator and RFIC [patent_app_type] => utility [patent_app_number] => 18/808348 [patent_app_country] => US [patent_app_date] => 2024-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 23 [patent_no_of_words] => 7563 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18808348 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19620071 [patent_doc_number] => 20240405751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => DIGITAL VARIABLE REACTANCE ELEMENT, PHASE SHIFTER, AND IMPEDANCE MATCHING CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/802007 [patent_app_country] => US [patent_app_date] => 2024-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3344 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18802007 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20521834 [patent_doc_number] => 20260045943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-12 [patent_title] => SELF-LEARNING GATE DRIVER [patent_app_type] => utility [patent_app_number] => 18/799765 [patent_app_country] => US [patent_app_date] => 2024-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6018 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18799765 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20551934 [patent_doc_number] => 12562737 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-24 [patent_title] => Switch linearization with asymmetrical anti-series varactor pair [patent_app_type] => utility [patent_app_number] => 18/789400 [patent_app_country] => US [patent_app_date] => 2024-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 23 [patent_no_of_words] => 3590 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18789400 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20476856 [patent_doc_number] => 20260019077 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-15 [patent_title] => DESKEW CIRCUIT AND METHOD FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/772700 [patent_app_country] => US [patent_app_date] => 2024-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18772700 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19713418 [patent_doc_number] => 20250023560 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => FAULT TOLERANT DRIVER CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/771275 [patent_app_country] => US [patent_app_date] => 2024-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3421 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18771275 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19713420 [patent_doc_number] => 20250023562 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => INTEGRATED CIRCUIT FUNCTIONAL AT AND CAPABLE OF WITHSTANDING A MAXIMUM VOLTAGE GREATER THAN A RATED VOLTAGE, AND CORRESPONDING METHOD [patent_app_type] => utility [patent_app_number] => 18/761050 [patent_app_country] => US [patent_app_date] => 2024-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4825 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18761050 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20223618 [patent_doc_number] => 20250286549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-11 [patent_title] => INTEGRATED CIRCUIT AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/756120 [patent_app_country] => US [patent_app_date] => 2024-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2108 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18756120 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19500986 [patent_doc_number] => 20240340004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => RF SWITCH STACK WITH CHARGE CONTROL ELEMENTS [patent_app_type] => utility [patent_app_number] => 18/749360 [patent_app_country] => US [patent_app_date] => 2024-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6552 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18749360 [rel_patent_id] =>[rel_patent_doc_number] =>)