Search

Colleen J. O. Toole

Examiner (ID: 10650, Phone: (571)270-1273 , Office: P/2842 )

Most Active Art Unit
2849
Art Unit(s)
2816, 2842, 2849, 2892, 2836
Total Applications
708
Issued Applications
392
Pending Applications
53
Abandoned Applications
275

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19030371 [patent_doc_number] => 11929742 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-12 [patent_title] => Method and device for switching an electronic component on or off [patent_app_type] => utility [patent_app_number] => 14/759051 [patent_app_country] => US [patent_app_date] => 2014-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 8082 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 269 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14759051 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/759051
Method and device for switching an electronic component on or off Apr 22, 2014 Issued
Array ( [id] => 14860311 [patent_doc_number] => 10418899 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-17 [patent_title] => MOSFET switch circuit for slow switching application [patent_app_type] => utility [patent_app_number] => 14/252568 [patent_app_country] => US [patent_app_date] => 2014-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 6195 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 436 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14252568 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/252568
MOSFET switch circuit for slow switching application Apr 13, 2014 Issued
Array ( [id] => 10303544 [patent_doc_number] => 20150188544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-02 [patent_title] => 'SEMICONDUCTOR APPARATUS CROSS-REFERENCES TO RELATED APPLICATION' [patent_app_type] => utility [patent_app_number] => 14/243526 [patent_app_country] => US [patent_app_date] => 2014-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3676 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14243526 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/243526
SEMICONDUCTOR APPARATUS CROSS-REFERENCES TO RELATED APPLICATION Apr 1, 2014 Abandoned
Array ( [id] => 10690282 [patent_doc_number] => 20160036428 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-04 [patent_title] => 'Fine-Grained Power Gating in FPGA Interconnects' [patent_app_type] => utility [patent_app_number] => 14/777473 [patent_app_country] => US [patent_app_date] => 2014-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 5946 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14777473 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/777473
Fine-grained power gating in FPGA interconnects Mar 13, 2014 Issued
Array ( [id] => 9595113 [patent_doc_number] => 20140191790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-10 [patent_title] => 'OFFSET CANCELLING CIRCUIT AND METHOD' [patent_app_type] => utility [patent_app_number] => 14/206857 [patent_app_country] => US [patent_app_date] => 2014-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4787 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14206857 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/206857
OFFSET CANCELLING CIRCUIT AND METHOD Mar 11, 2014 Abandoned
Array ( [id] => 9595113 [patent_doc_number] => 20140191790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-10 [patent_title] => 'OFFSET CANCELLING CIRCUIT AND METHOD' [patent_app_type] => utility [patent_app_number] => 14/206857 [patent_app_country] => US [patent_app_date] => 2014-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4787 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14206857 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/206857
OFFSET CANCELLING CIRCUIT AND METHOD Mar 11, 2014 Abandoned
Array ( [id] => 9730692 [patent_doc_number] => 20140266399 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'ACTIVE LUMPED ELEMENT CIRCULATOR' [patent_app_type] => utility [patent_app_number] => 14/201552 [patent_app_country] => US [patent_app_date] => 2014-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4687 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14201552 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/201552
ACTIVE LUMPED ELEMENT CIRCULATOR Mar 6, 2014 Abandoned
Array ( [id] => 10364443 [patent_doc_number] => 20150249448 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-03 [patent_title] => 'Electronic Circuit Operable as an Electronic Switch' [patent_app_type] => utility [patent_app_number] => 14/193517 [patent_app_country] => US [patent_app_date] => 2014-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6814 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14193517 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/193517
Electronic Circuit Operable as an Electronic Switch Feb 27, 2014 Abandoned
Array ( [id] => 10487653 [patent_doc_number] => 20150372675 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-24 [patent_title] => 'METHOD OF SWITCHING A SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/767344 [patent_app_country] => US [patent_app_date] => 2014-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8469 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14767344 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/767344
METHOD OF SWITCHING A SEMICONDUCTOR DEVICE Feb 6, 2014 Abandoned
Array ( [id] => 9783582 [patent_doc_number] => 20140300402 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-09 [patent_title] => 'SIGNAL PROCESSING CIRCUIT' [patent_app_type] => utility [patent_app_number] => 14/173109 [patent_app_country] => US [patent_app_date] => 2014-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6048 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14173109 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/173109
SIGNAL PROCESSING CIRCUIT Feb 4, 2014 Abandoned
Array ( [id] => 9639989 [patent_doc_number] => 20140218099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-07 [patent_title] => 'ELECTRONIC APPARATUS' [patent_app_type] => utility [patent_app_number] => 14/168388 [patent_app_country] => US [patent_app_date] => 2014-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 15618 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14168388 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/168388
Electronic apparatus Jan 29, 2014 Issued
Array ( [id] => 11266503 [patent_doc_number] => 09490810 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-11-08 [patent_title] => 'Low-noise, temperature-insensitive, voltage or current input, analog front end architecture' [patent_app_type] => utility [patent_app_number] => 14/157977 [patent_app_country] => US [patent_app_date] => 2014-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 5771 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14157977 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/157977
Low-noise, temperature-insensitive, voltage or current input, analog front end architecture Jan 16, 2014 Issued
Array ( [id] => 9783586 [patent_doc_number] => 20140300406 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-09 [patent_title] => 'INRUSH CURRENT CONTROL CIRCUIT' [patent_app_type] => utility [patent_app_number] => 14/134246 [patent_app_country] => US [patent_app_date] => 2013-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1221 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14134246 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/134246
INRUSH CURRENT CONTROL CIRCUIT Dec 18, 2013 Abandoned
Array ( [id] => 9783585 [patent_doc_number] => 20140300405 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-09 [patent_title] => 'INRUSH CURRENT CONTROL CIRCUIT' [patent_app_type] => utility [patent_app_number] => 14/134238 [patent_app_country] => US [patent_app_date] => 2013-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1060 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14134238 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/134238
INRUSH CURRENT CONTROL CIRCUIT Dec 18, 2013 Abandoned
Array ( [id] => 10212612 [patent_doc_number] => 20150097605 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-09 [patent_title] => 'DUTY CORRECTION CIRCUIT AND METHOD' [patent_app_type] => utility [patent_app_number] => 14/106793 [patent_app_country] => US [patent_app_date] => 2013-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4467 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14106793 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/106793
DUTY CORRECTION CIRCUIT AND METHOD Dec 14, 2013 Abandoned
Array ( [id] => 9406624 [patent_doc_number] => 20140097876 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-10 [patent_title] => 'GATE DRIVING CIRCUIT AND METHOD FOR DRIVING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/106205 [patent_app_country] => US [patent_app_date] => 2013-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3916 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14106205 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/106205
GATE DRIVING CIRCUIT AND METHOD FOR DRIVING SEMICONDUCTOR DEVICE Dec 12, 2013 Abandoned
Array ( [id] => 9855558 [patent_doc_number] => 20150035575 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-05 [patent_title] => 'DATA OUTPUT CIRCUITS' [patent_app_type] => utility [patent_app_number] => 14/105399 [patent_app_country] => US [patent_app_date] => 2013-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6561 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14105399 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/105399
DATA OUTPUT CIRCUITS Dec 12, 2013 Abandoned
Array ( [id] => 10538390 [patent_doc_number] => 09264028 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-16 [patent_title] => 'Zero crossing detector using current mode approach' [patent_app_type] => utility [patent_app_number] => 14/103803 [patent_app_country] => US [patent_app_date] => 2013-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4844 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14103803 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/103803
Zero crossing detector using current mode approach Dec 10, 2013 Issued
Array ( [id] => 9535147 [patent_doc_number] => 20140159793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-12 [patent_title] => 'SYSTEM CLOCK MATCHING' [patent_app_type] => utility [patent_app_number] => 14/098647 [patent_app_country] => US [patent_app_date] => 2013-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3318 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14098647 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/098647
SYSTEM CLOCK MATCHING Dec 5, 2013 Abandoned
Array ( [id] => 11579375 [patent_doc_number] => 09634648 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-04-25 [patent_title] => 'Trimming a temperature dependent voltage reference' [patent_app_type] => utility [patent_app_number] => 14/098222 [patent_app_country] => US [patent_app_date] => 2013-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 8132 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14098222 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/098222
Trimming a temperature dependent voltage reference Dec 4, 2013 Issued
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