Colleen J. O. Toole

Array ( [id] => 19713418 [patent_doc_number] => 20250023560 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => FAULT TOLERANT DRIVER CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/771275 [patent_app_country] => US [patent_app_date] => 2024-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3421 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18771275 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19713420 [patent_doc_number] => 20250023562 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => INTEGRATED CIRCUIT FUNCTIONAL AT AND CAPABLE OF WITHSTANDING A MAXIMUM VOLTAGE GREATER THAN A RATED VOLTAGE, AND CORRESPONDING METHOD [patent_app_type] => utility [patent_app_number] => 18/761050 [patent_app_country] => US [patent_app_date] => 2024-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4825 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18761050 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20223618 [patent_doc_number] => 20250286549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-11 [patent_title] => INTEGRATED CIRCUIT AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/756120 [patent_app_country] => US [patent_app_date] => 2024-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2108 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18756120 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19500986 [patent_doc_number] => 20240340004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => RF SWITCH STACK WITH CHARGE CONTROL ELEMENTS [patent_app_type] => utility [patent_app_number] => 18/749360 [patent_app_country] => US [patent_app_date] => 2024-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6552 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18749360 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20382493 [patent_doc_number] => 20250364986 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-27 [patent_title] => PROGRAMMABLE GATE VOLTAGE FOR ON RESISTANCE CONTROL OF POWER MODULE [patent_app_type] => utility [patent_app_number] => 18/672654 [patent_app_country] => US [patent_app_date] => 2024-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1167 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18672654 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19635372 [patent_doc_number] => 20240413821 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => CIRCUIT AND SYSTEM FOR ACCELERATING RECOVERY OF INTEGRATED CIRCUIT AGING [patent_app_type] => utility [patent_app_number] => 18/648441 [patent_app_country] => US [patent_app_date] => 2024-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2276 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18648441 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20637031 [patent_doc_number] => 12597920 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-07 [patent_title] => Power switch circuit [patent_app_type] => utility [patent_app_number] => 18/632238 [patent_app_country] => US [patent_app_date] => 2024-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 1149 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18632238 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19516563 [patent_doc_number] => 20240348249 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => POWER MOSFET DRIVER CIRCUIT ARRANGEMENT AND CORRESPONDING CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 18/630493 [patent_app_country] => US [patent_app_date] => 2024-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8342 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18630493 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20284645 [patent_doc_number] => 20250309887 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => CONTROLLING A POWER SWITCHING ELEMENT USING A SENSE SWITCHING ELEMENT [patent_app_type] => utility [patent_app_number] => 18/622369 [patent_app_country] => US [patent_app_date] => 2024-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2100 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18622369 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19286696 [patent_doc_number] => 20240223176 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => OPTIMIZATION OF POWER MODULE PERFORMANCE VIA PARASITIC MUTUAL COUPLING [patent_app_type] => utility [patent_app_number] => 18/429613 [patent_app_country] => US [patent_app_date] => 2024-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9433 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18429613 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19576104 [patent_doc_number] => 20240380396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => PRE-CONDITIONING A NODE OF A CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/428442 [patent_app_country] => US [patent_app_date] => 2024-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9636 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18428442 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19965402 [patent_doc_number] => 12334926 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-17 [patent_title] => Duty cycle distortion (DCD) sampling in a low-swing transmitter [patent_app_type] => utility [patent_app_number] => 18/398779 [patent_app_country] => US [patent_app_date] => 2023-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 2329 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18398779 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20064248 [patent_doc_number] => 20250202470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => LINEAR OUTPUT DRIVER ARCHITECTURE FOR OPTICAL MODULATORS [patent_app_type] => utility [patent_app_number] => 18/539389 [patent_app_country] => US [patent_app_date] => 2023-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1182 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18539389 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20539002 [patent_doc_number] => 12556082 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-17 [patent_title] => Driving circuit of bridge circuit [patent_app_type] => utility [patent_app_number] => 18/530608 [patent_app_country] => US [patent_app_date] => 2023-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5741 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18530608 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20045669 [patent_doc_number] => 20250183891 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => LINE DRIVERS FOR LOW-VOLTAGE SIGNALING BETWEEN DIFFERENT VOLTAGE DOMAINS [patent_app_type] => utility [patent_app_number] => 18/527921 [patent_app_country] => US [patent_app_date] => 2023-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2246 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18527921 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20318413 [patent_doc_number] => 12456971 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-28 [patent_title] => Method and apparatus for limiting minority carrier injection [patent_app_type] => utility [patent_app_number] => 18/524664 [patent_app_country] => US [patent_app_date] => 2023-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 0 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18524664 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19206935 [patent_doc_number] => 20240178834 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => Drive Voltage Generator [patent_app_type] => utility [patent_app_number] => 18/522571 [patent_app_country] => US [patent_app_date] => 2023-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4816 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 309 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18522571 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20204555 [patent_doc_number] => 12407345 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-02 [patent_title] => Switched inductive storage element to enhance gate drive at turn-off [patent_app_type] => utility [patent_app_number] => 18/520376 [patent_app_country] => US [patent_app_date] => 2023-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 40 [patent_no_of_words] => 20271 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18520376 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20036948 [patent_doc_number] => 20250175170 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => GATE DRIVER WITH INTEGRATED SELF SHORT CIRCUIT DETECTION AND PROTECTION [patent_app_type] => utility [patent_app_number] => 18/519439 [patent_app_country] => US [patent_app_date] => 2023-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11853 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18519439 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20852326 [patent_doc_number] => 12689369 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-07-21 [patent_title] => Switching control [patent_app_type] => utility [patent_app_number] => 18/519665 [patent_app_country] => US [patent_app_date] => 2023-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 5336 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18519665 [rel_patent_id] =>[rel_patent_doc_number] =>)