Search

Collin Dawkins

Examiner (ID: 6593, Phone: (571)270-1087 , Office: P/2845 )

Most Active Art Unit
2845
Art Unit(s)
2845, 2821
Total Applications
355
Issued Applications
270
Pending Applications
1
Abandoned Applications
87

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11791683 [patent_doc_number] => 09401324 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-26 [patent_title] => 'Semiconductor device having an on die termination circuit' [patent_app_type] => utility [patent_app_number] => 14/023962 [patent_app_country] => US [patent_app_date] => 2013-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 7751 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14023962 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/023962
Semiconductor device having an on die termination circuit Sep 10, 2013 Issued
Array ( [id] => 10094455 [patent_doc_number] => 09131294 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-08 [patent_title] => 'Apparatus including microphone arrangements' [patent_app_type] => utility [patent_app_number] => 13/975761 [patent_app_country] => US [patent_app_date] => 2013-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 5078 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13975761 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/975761
Apparatus including microphone arrangements Aug 25, 2013 Issued
Array ( [id] => 9875954 [patent_doc_number] => 08963226 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-24 [patent_title] => 'Semiconductor device with gate electrodes' [patent_app_type] => utility [patent_app_number] => 13/970703 [patent_app_country] => US [patent_app_date] => 2013-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 26 [patent_no_of_words] => 16016 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 302 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13970703 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/970703
Semiconductor device with gate electrodes Aug 19, 2013 Issued
Array ( [id] => 11201353 [patent_doc_number] => 09431574 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-30 [patent_title] => 'Light-emitting device including color filter and black matrix' [patent_app_type] => utility [patent_app_number] => 13/969911 [patent_app_country] => US [patent_app_date] => 2013-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 70 [patent_no_of_words] => 41420 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 394 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13969911 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/969911
Light-emitting device including color filter and black matrix Aug 18, 2013 Issued
Array ( [id] => 11510450 [patent_doc_number] => 09601619 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-21 [patent_title] => 'MOS devices with non-uniform P-type impurity profile' [patent_app_type] => utility [patent_app_number] => 13/943517 [patent_app_country] => US [patent_app_date] => 2013-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3781 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13943517 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/943517
MOS devices with non-uniform P-type impurity profile Jul 15, 2013 Issued
Array ( [id] => 9802829 [patent_doc_number] => 20150014774 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-15 [patent_title] => 'MERGED TAPERED FINFET' [patent_app_type] => utility [patent_app_number] => 13/941813 [patent_app_country] => US [patent_app_date] => 2013-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8393 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13941813 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/941813
Merged tapered finFET Jul 14, 2013 Issued
Array ( [id] => 9802832 [patent_doc_number] => 20150014778 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-15 [patent_title] => 'MULTIPLE VIA STRUCTURE AND METHOD' [patent_app_type] => utility [patent_app_number] => 13/940874 [patent_app_country] => US [patent_app_date] => 2013-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5411 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13940874 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/940874
Multiple via structure and method Jul 11, 2013 Issued
Array ( [id] => 11483500 [patent_doc_number] => 09590058 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-07 [patent_title] => 'Methods and structures for a split gate memory cell structure' [patent_app_type] => utility [patent_app_number] => 13/929924 [patent_app_country] => US [patent_app_date] => 2013-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4316 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13929924 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/929924
Methods and structures for a split gate memory cell structure Jun 27, 2013 Issued
Array ( [id] => 11180737 [patent_doc_number] => 09412733 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-09 [patent_title] => 'MOSFET with integrated schottky diode' [patent_app_type] => utility [patent_app_number] => 13/926880 [patent_app_country] => US [patent_app_date] => 2013-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 39 [patent_no_of_words] => 9459 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13926880 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/926880
MOSFET with integrated schottky diode Jun 24, 2013 Issued
Array ( [id] => 11411732 [patent_doc_number] => 09559044 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-31 [patent_title] => 'Package with solder regions aligned to recesses' [patent_app_type] => utility [patent_app_number] => 13/926981 [patent_app_country] => US [patent_app_date] => 2013-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 21 [patent_no_of_words] => 3688 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13926981 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/926981
Package with solder regions aligned to recesses Jun 24, 2013 Issued
Array ( [id] => 10971799 [patent_doc_number] => 20140374834 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-25 [patent_title] => 'GERMANIUM STRUCTURE, GERMANIUM FIN FIELD EFFECT TRANSISTOR STRUCTURE AND GERMANIUM COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR TRANSISTOR STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/922354 [patent_app_country] => US [patent_app_date] => 2013-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4001 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13922354 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/922354
GERMANIUM STRUCTURE, GERMANIUM FIN FIELD EFFECT TRANSISTOR STRUCTURE AND GERMANIUM COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR TRANSISTOR STRUCTURE Jun 19, 2013 Abandoned
Array ( [id] => 10950810 [patent_doc_number] => 20140353830 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-04 [patent_title] => 'SEMICONDUCTOR DEVICES WITH MULTILAYER FLEX INTERCONNECT STRUCTURES' [patent_app_type] => utility [patent_app_number] => 13/903230 [patent_app_country] => US [patent_app_date] => 2013-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4229 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13903230 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/903230
Semiconductor devices with multilayer flex interconnect structures May 27, 2013 Issued
Array ( [id] => 11201275 [patent_doc_number] => 09431497 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-30 [patent_title] => 'Transistor devices having an anti-fuse configuration and methods of forming the same' [patent_app_type] => utility [patent_app_number] => 13/899150 [patent_app_country] => US [patent_app_date] => 2013-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 7814 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13899150 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/899150
Transistor devices having an anti-fuse configuration and methods of forming the same May 20, 2013 Issued
Array ( [id] => 11180713 [patent_doc_number] => 09412709 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-09 [patent_title] => 'Semiconductor structure with sacrificial anode and passivation layer and method for forming' [patent_app_type] => utility [patent_app_number] => 13/898949 [patent_app_country] => US [patent_app_date] => 2013-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 21 [patent_no_of_words] => 4176 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13898949 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/898949
Semiconductor structure with sacrificial anode and passivation layer and method for forming May 20, 2013 Issued
Array ( [id] => 9850130 [patent_doc_number] => 08951858 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-10 [patent_title] => 'Imager device with electric connections to electrical device' [patent_app_type] => utility [patent_app_number] => 13/861580 [patent_app_country] => US [patent_app_date] => 2013-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2798 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13861580 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/861580
Imager device with electric connections to electrical device Apr 11, 2013 Issued
Array ( [id] => 10624576 [patent_doc_number] => 09343526 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-17 [patent_title] => 'Deep trench isolation' [patent_app_type] => utility [patent_app_number] => 13/801514 [patent_app_country] => US [patent_app_date] => 2013-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5883 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13801514 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/801514
Deep trench isolation Mar 12, 2013 Issued
Array ( [id] => 9051228 [patent_doc_number] => 20130248942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-26 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/800498 [patent_app_country] => US [patent_app_date] => 2013-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4792 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13800498 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/800498
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Mar 12, 2013
Array ( [id] => 9497219 [patent_doc_number] => 08736041 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-27 [patent_title] => 'Power converter' [patent_app_type] => utility [patent_app_number] => 13/799702 [patent_app_country] => US [patent_app_date] => 2013-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5986 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13799702 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/799702
Power converter Mar 12, 2013 Issued
Array ( [id] => 10189697 [patent_doc_number] => 09219128 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-22 [patent_title] => 'Methods of fabricating bipolar junction transistors with reduced epitaxial base facets effect for low parasitic collector-base capacitance' [patent_app_type] => utility [patent_app_number] => 13/800091 [patent_app_country] => US [patent_app_date] => 2013-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7901 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13800091 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/800091
Methods of fabricating bipolar junction transistors with reduced epitaxial base facets effect for low parasitic collector-base capacitance Mar 12, 2013 Issued
Array ( [id] => 10195981 [patent_doc_number] => 09224896 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-29 [patent_title] => 'Photoelectric conversion material' [patent_app_type] => utility [patent_app_number] => 13/788868 [patent_app_country] => US [patent_app_date] => 2013-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 3742 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13788868 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/788868
Photoelectric conversion material Mar 6, 2013 Issued
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