
Connie C. Yoha
Examiner (ID: 10490, Phone: (571)272-1799 , Office: P/2825 )
| Most Active Art Unit | 2825 |
| Art Unit(s) | 2827, 2825, 2818 |
| Total Applications | 1355 |
| Issued Applications | 1259 |
| Pending Applications | 46 |
| Abandoned Applications | 62 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19559623
[patent_doc_number] => 20240371415
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-07
[patent_title] => METHODS FOR EFFICIENT 3D SRAM-BASED COMPUTE-IN-MEMORY
[patent_app_type] => utility
[patent_app_number] => 18/653788
[patent_app_country] => US
[patent_app_date] => 2024-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11823
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18653788
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/653788 | Methods for efficient 3D SRAM-based compute-in-memory | May 1, 2024 | Issued |
Array
(
[id] => 19363933
[patent_doc_number] => 20240265967
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-08
[patent_title] => NON-VOLATILE CONTENT ADDRESSABLE MEMORY DEVICE HAVING SIMPLE CELL CONFIGURATION AND OPERATING METHOD OF THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/621853
[patent_app_country] => US
[patent_app_date] => 2024-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7922
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18621853
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/621853 | NON-VOLATILE CONTENT ADDRESSABLE MEMORY DEVICE HAVING SIMPLE CELL CONFIGURATION AND OPERATING METHOD OF THE SAME | Mar 28, 2024 | Pending |
Array
(
[id] => 20044593
[patent_doc_number] => 20250182815
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-05
[patent_title] => MEMORYS, OPERATION METHODS THEREOF AND MEMORY SYSTEMS
[patent_app_type] => utility
[patent_app_number] => 18/614153
[patent_app_country] => US
[patent_app_date] => 2024-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6218
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18614153
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/614153 | MEMORYS, OPERATION METHODS THEREOF AND MEMORY SYSTEMS | Mar 21, 2024 | Pending |
Array
(
[id] => 20222747
[patent_doc_number] => 20250285678
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-09-11
[patent_title] => DYNAMIC ANALOG CONTENT ADDRESSABLE MEMORY
[patent_app_type] => utility
[patent_app_number] => 18/598873
[patent_app_country] => US
[patent_app_date] => 2024-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2419
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18598873
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/598873 | DYNAMIC ANALOG CONTENT ADDRESSABLE MEMORY | Mar 6, 2024 | Pending |
Array
(
[id] => 20222747
[patent_doc_number] => 20250285678
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-09-11
[patent_title] => DYNAMIC ANALOG CONTENT ADDRESSABLE MEMORY
[patent_app_type] => utility
[patent_app_number] => 18/598873
[patent_app_country] => US
[patent_app_date] => 2024-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2419
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18598873
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/598873 | DYNAMIC ANALOG CONTENT ADDRESSABLE MEMORY | Mar 6, 2024 | Pending |
Array
(
[id] => 20002077
[patent_doc_number] => 20250140299
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-01
[patent_title] => SEMICONDUCTOR DEVICE AND MEMORY DEVICE INCLUDING SAMPLING CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 18/581376
[patent_app_country] => US
[patent_app_date] => 2024-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4468
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18581376
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/581376 | SEMICONDUCTOR DEVICE AND MEMORY DEVICE INCLUDING SAMPLING CIRCUIT | Feb 19, 2024 | Pending |
Array
(
[id] => 19350043
[patent_doc_number] => 20240259007
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-01
[patent_title] => RECEIVER INCLUDING A PULSE AMPLITUDE MODULATION DECODER, AND A MEMORY DEVICE INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/428045
[patent_app_country] => US
[patent_app_date] => 2024-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5888
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18428045
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/428045 | RECEIVER INCLUDING A PULSE AMPLITUDE MODULATION DECODER, AND A MEMORY DEVICE INCLUDING THE SAME | Jan 30, 2024 | Pending |
Array
(
[id] => 20096091
[patent_doc_number] => 20250226027
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-07-10
[patent_title] => MEMORY STRUCTURE AND CONTROL METHOD FOR MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/407453
[patent_app_country] => US
[patent_app_date] => 2024-01-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 173
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18407453
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/407453 | MEMORY STRUCTURE AND CONTROL METHOD FOR MEMORY DEVICE | Jan 8, 2024 | Pending |
Array
(
[id] => 19285329
[patent_doc_number] => 20240221806
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-04
[patent_title] => SIGNAL DEVELOPMENT CIRCUITRY LAYOUTS IN A MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/408252
[patent_app_country] => US
[patent_app_date] => 2024-01-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 25043
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18408252
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/408252 | SIGNAL DEVELOPMENT CIRCUITRY LAYOUTS IN A MEMORY DEVICE | Jan 8, 2024 | Pending |
Array
(
[id] => 20036045
[patent_doc_number] => 20250174267
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-29
[patent_title] => MEMORY DEVICE AND SYSTEM, AND DECODING CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 18/396557
[patent_app_country] => US
[patent_app_date] => 2023-12-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8617
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18396557
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/396557 | MEMORY DEVICE AND SYSTEM, AND DECODING CIRCUIT | Dec 25, 2023 | Pending |
Array
(
[id] => 19269027
[patent_doc_number] => 20240212731
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-27
[patent_title] => MEMORY ARRAY CIRCUIT ARRANGEMENT
[patent_app_type] => utility
[patent_app_number] => 18/391380
[patent_app_country] => US
[patent_app_date] => 2023-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13463
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18391380
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/391380 | MEMORY ARRAY CIRCUIT ARRANGEMENT | Dec 19, 2023 | Pending |
Array
(
[id] => 20434893
[patent_doc_number] => 12505875
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-12-23
[patent_title] => Data input buffer with a branched DFE reset path
[patent_app_type] => utility
[patent_app_number] => 18/542581
[patent_app_country] => US
[patent_app_date] => 2023-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 4755
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18542581
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/542581 | Data input buffer with a branched DFE reset path | Dec 14, 2023 | Issued |
Array
(
[id] => 20434893
[patent_doc_number] => 12505875
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-12-23
[patent_title] => Data input buffer with a branched DFE reset path
[patent_app_type] => utility
[patent_app_number] => 18/542581
[patent_app_country] => US
[patent_app_date] => 2023-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 4755
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18542581
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/542581 | Data input buffer with a branched DFE reset path | Dec 14, 2023 | Issued |
Array
(
[id] => 19054421
[patent_doc_number] => 20240096390
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-21
[patent_title] => SWITCH AND HOLD BIASING FOR MEMORY CELL IMPRINT RECOVERY
[patent_app_type] => utility
[patent_app_number] => 18/521872
[patent_app_country] => US
[patent_app_date] => 2023-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 21415
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18521872
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/521872 | SWITCH AND HOLD BIASING FOR MEMORY CELL IMPRINT RECOVERY | Nov 27, 2023 | Pending |
Array
(
[id] => 19116144
[patent_doc_number] => 20240127894
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-18
[patent_title] => Method for Reading Data Stored in a Flash Memory According to a Voltage Characteristic and Memory Controller Thereof
[patent_app_type] => utility
[patent_app_number] => 18/515691
[patent_app_country] => US
[patent_app_date] => 2023-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8086
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18515691
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/515691 | Method for Reading Data Stored in a Flash Memory According to a Voltage Characteristic and Memory Controller Thereof | Nov 20, 2023 | Pending |
Array
(
[id] => 19005744
[patent_doc_number] => 20240069815
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-29
[patent_title] => MANAGING WRITE DISTURB BASED ON IDENTIFICATION OF FREQUENTLY-WRITTEN MEMORY UNITS
[patent_app_type] => utility
[patent_app_number] => 18/388342
[patent_app_country] => US
[patent_app_date] => 2023-11-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10103
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18388342
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/388342 | MANAGING WRITE DISTURB BASED ON IDENTIFICATION OF FREQUENTLY-WRITTEN MEMORY UNITS | Nov 8, 2023 | Pending |
Array
(
[id] => 20010861
[patent_doc_number] => 20250149083
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-08
[patent_title] => IN-MEMORY COMPUTING (IMC) MEMORY DEVICE AND IN-MEMORY COMPUTING METHOD
[patent_app_type] => utility
[patent_app_number] => 18/504254
[patent_app_country] => US
[patent_app_date] => 2023-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3416
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 300
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18504254
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/504254 | In-memory computing (IMC) memory device and in-memory computing method | Nov 7, 2023 | Issued |
Array
(
[id] => 19237056
[patent_doc_number] => 20240194251
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-13
[patent_title] => LOCAL DIGIT LINE (LDL) COUPLING CANCELLATION
[patent_app_type] => utility
[patent_app_number] => 18/499934
[patent_app_country] => US
[patent_app_date] => 2023-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4585
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18499934
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/499934 | LOCAL DIGIT LINE (LDL) COUPLING CANCELLATION | Oct 31, 2023 | Pending |
Array
(
[id] => 20416636
[patent_doc_number] => 12499925
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-12-16
[patent_title] => Memory and operation method thereof and memory system
[patent_app_type] => utility
[patent_app_number] => 18/371749
[patent_app_country] => US
[patent_app_date] => 2023-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 29
[patent_no_of_words] => 13791
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18371749
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/371749 | Memory and operation method thereof and memory system | Sep 21, 2023 | Issued |
Array
(
[id] => 20161155
[patent_doc_number] => 12387788
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-08-12
[patent_title] => Compression of analog content addressable memory
[patent_app_type] => utility
[patent_app_number] => 18/469457
[patent_app_country] => US
[patent_app_date] => 2023-09-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 3400
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18469457
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/469457 | Compression of analog content addressable memory | Sep 17, 2023 | Issued |