Search

Connie C. Yoha

Examiner (ID: 10490, Phone: (571)272-1799 , Office: P/2825 )

Most Active Art Unit
2825
Art Unit(s)
2827, 2825, 2818
Total Applications
1355
Issued Applications
1259
Pending Applications
46
Abandoned Applications
62

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18455873 [patent_doc_number] => 20230197154 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => STATIC RANDOM-ACCESS MEMORY (SRAM) CELL FOR HIGH-SPEED CONTENT-ADDRESSABLE MEMORY AND IN-MEMORY BOOLEAN LOGIC OPERATION [patent_app_type] => utility [patent_app_number] => 17/802968 [patent_app_country] => US [patent_app_date] => 2021-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2767 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17802968 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/802968
STATIC RANDOM-ACCESS MEMORY (SRAM) CELL FOR HIGH-SPEED CONTENT-ADDRESSABLE MEMORY AND IN-MEMORY BOOLEAN LOGIC OPERATION Sep 21, 2021 Abandoned
Array ( [id] => 19370303 [patent_doc_number] => 12062393 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-13 [patent_title] => Nonvolatile semiconductor memory device with a plurality of memory blocks and a shared block decoder [patent_app_type] => utility [patent_app_number] => 17/471597 [patent_app_country] => US [patent_app_date] => 2021-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 14303 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 558 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17471597 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/471597
Nonvolatile semiconductor memory device with a plurality of memory blocks and a shared block decoder Sep 9, 2021 Issued
Array ( [id] => 19079250 [patent_doc_number] => 11948625 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-02 [patent_title] => Systems on chips, memory circuits, and methods for accessing data in a memory circuit directly using a transistor-level operation signal [patent_app_type] => utility [patent_app_number] => 17/471073 [patent_app_country] => US [patent_app_date] => 2021-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9366 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17471073 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/471073
Systems on chips, memory circuits, and methods for accessing data in a memory circuit directly using a transistor-level operation signal Sep 8, 2021 Issued
Array ( [id] => 18031775 [patent_doc_number] => 11514970 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-29 [patent_title] => Memory device and method having a control circuit configured to acquire information on a state of a control target, causes the control target to execute a read and write operation based on the state [patent_app_type] => utility [patent_app_number] => 17/470802 [patent_app_country] => US [patent_app_date] => 2021-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 31 [patent_no_of_words] => 20923 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 393 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17470802 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/470802
Memory device and method having a control circuit configured to acquire information on a state of a control target, causes the control target to execute a read and write operation based on the state Sep 8, 2021 Issued
Array ( [id] => 18240570 [patent_doc_number] => 20230072881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => MANAGING WRITE DISTURB BASED ON IDENTIFICATION OF FREQUENTLY-WRITTEN MEMORY UNITS [patent_app_type] => utility [patent_app_number] => 17/468588 [patent_app_country] => US [patent_app_date] => 2021-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10074 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17468588 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/468588
Managing write disturb based on identification of frequently-written memory units Sep 6, 2021 Issued
Array ( [id] => 18226609 [patent_doc_number] => 20230065603 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => PRE-COMPARE OPERATION FOR COMPACT LOW-LEAKAGE DUAL-COMPARE CAM CELL [patent_app_type] => utility [patent_app_number] => 17/462659 [patent_app_country] => US [patent_app_date] => 2021-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14891 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17462659 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/462659
Pre-compare operation for compact low-leakage dual-compare cam cell Aug 30, 2021 Issued
Array ( [id] => 18782004 [patent_doc_number] => 11823769 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => Reducing capacitive loading of memory system based on switches [patent_app_type] => utility [patent_app_number] => 17/460216 [patent_app_country] => US [patent_app_date] => 2021-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7852 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17460216 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/460216
Reducing capacitive loading of memory system based on switches Aug 27, 2021 Issued
Array ( [id] => 18212674 [patent_doc_number] => 20230058938 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-23 [patent_title] => PROBABILISTIC COMPUTING DEVICES BASED ON STOCHASTIC SWITCHING IN A FERROELECTRIC FIELD-EFFECT TRANSISTOR [patent_app_type] => utility [patent_app_number] => 17/409483 [patent_app_country] => US [patent_app_date] => 2021-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14581 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17409483 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/409483
Probabilistic computing devices based on stochastic switching in a ferroelectric field-effect transistor Aug 22, 2021 Issued
Array ( [id] => 18212674 [patent_doc_number] => 20230058938 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-23 [patent_title] => PROBABILISTIC COMPUTING DEVICES BASED ON STOCHASTIC SWITCHING IN A FERROELECTRIC FIELD-EFFECT TRANSISTOR [patent_app_type] => utility [patent_app_number] => 17/409483 [patent_app_country] => US [patent_app_date] => 2021-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14581 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17409483 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/409483
Probabilistic computing devices based on stochastic switching in a ferroelectric field-effect transistor Aug 22, 2021 Issued
Array ( [id] => 19539242 [patent_doc_number] => 12131797 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-29 [patent_title] => Data transmission circuit, data transmission method and memory device [patent_app_type] => utility [patent_app_number] => 17/769934 [patent_app_country] => US [patent_app_date] => 2021-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5071 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17769934 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/769934
Data transmission circuit, data transmission method and memory device Aug 11, 2021 Issued
Array ( [id] => 19672742 [patent_doc_number] => 12185538 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-31 [patent_title] => Semiconductor memory device with a three-dimensional stacked memory cell structure [patent_app_type] => utility [patent_app_number] => 17/398654 [patent_app_country] => US [patent_app_date] => 2021-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 4546 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 291 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17398654 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/398654
Semiconductor memory device with a three-dimensional stacked memory cell structure Aug 9, 2021 Issued
Array ( [id] => 18639285 [patent_doc_number] => 11763901 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Nonvolatile memory device and method of detecting defective memory cell block of nonvolatile memory device [patent_app_type] => utility [patent_app_number] => 17/397012 [patent_app_country] => US [patent_app_date] => 2021-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 12849 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17397012 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/397012
Nonvolatile memory device and method of detecting defective memory cell block of nonvolatile memory device Aug 8, 2021 Issued
Array ( [id] => 18721257 [patent_doc_number] => 11798609 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-24 [patent_title] => Semiconductor memory device including control unit controlling time interval of refresh operation on memory to shorten interval between memory refresh operations corresponding to read/write access requirement [patent_app_type] => utility [patent_app_number] => 17/395667 [patent_app_country] => US [patent_app_date] => 2021-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 10617 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17395667 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/395667
Semiconductor memory device including control unit controlling time interval of refresh operation on memory to shorten interval between memory refresh operations corresponding to read/write access requirement Aug 5, 2021 Issued
Array ( [id] => 17373397 [patent_doc_number] => 20220028449 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => CIRCUITS FOR POWER DOWN LEAKAGE REDUCTION IN RANDOM-ACCESS MEMORY [patent_app_type] => utility [patent_app_number] => 17/443480 [patent_app_country] => US [patent_app_date] => 2021-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3113 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17443480 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/443480
Circuits for power down leakage reduction in random-access memory Jul 26, 2021 Issued
Array ( [id] => 17582618 [patent_doc_number] => 20220139473 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => NON-VOLATILE MEMORY DEVICE FOR PERFORMING PRECHARGE TO CELL STRING AND PROGRAM METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/385493 [patent_app_country] => US [patent_app_date] => 2021-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8317 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17385493 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/385493
Non-volatile memory device for performing precharge to cell string and program method thereof Jul 25, 2021 Issued
Array ( [id] => 17917166 [patent_doc_number] => 20220319562 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => ELECTRONIC DEVICE FOR PERFORMING READ OPERATION USING PIPE CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/375400 [patent_app_country] => US [patent_app_date] => 2021-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14536 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17375400 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/375400
Electronic device for performing read operation using pipe circuit Jul 13, 2021 Issued
Array ( [id] => 17203243 [patent_doc_number] => 20210343338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => OVERWRITE READ METHODS FOR RESISTANCE SWITCHING MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/375993 [patent_app_country] => US [patent_app_date] => 2021-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11273 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17375993 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/375993
Overwrite read methods for resistance switching memory devices Jul 13, 2021 Issued
Array ( [id] => 17833368 [patent_doc_number] => 20220270672 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/365462 [patent_app_country] => US [patent_app_date] => 2021-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9546 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17365462 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/365462
Semiconductor memory device for performing target refresh operation and hidden refresh operation in response to normal refresh command and determining row hammer risk level Jun 30, 2021 Issued
Array ( [id] => 18304243 [patent_doc_number] => 11626155 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-11 [patent_title] => Memory and operation method having a random seed generation circuit, random signal generator, and an address sampling circuit for sampling active address [patent_app_type] => utility [patent_app_number] => 17/365506 [patent_app_country] => US [patent_app_date] => 2021-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3278 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17365506 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/365506
Memory and operation method having a random seed generation circuit, random signal generator, and an address sampling circuit for sampling active address Jun 30, 2021 Issued
Array ( [id] => 17173843 [patent_doc_number] => 20210327514 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => ERASE CYCLE HEALING USING A HIGH VOLTAGE PULSE [patent_app_type] => utility [patent_app_number] => 17/361259 [patent_app_country] => US [patent_app_date] => 2021-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9403 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17361259 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/361259
Erase cycle healing using a high voltage pulse Jun 27, 2021 Issued
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