
Corey D. Mack
Examiner (ID: 2607)
| Most Active Art Unit | 2855 |
| Art Unit(s) | 2855 |
| Total Applications | 249 |
| Issued Applications | 225 |
| Pending Applications | 6 |
| Abandoned Applications | 18 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19078450
[patent_doc_number] => 11947818
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-02
[patent_title] => Method for accessing flash memory module and associated flash memory controller and electronic device
[patent_app_type] => utility
[patent_app_number] => 17/725531
[patent_app_country] => US
[patent_app_date] => 2022-04-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 4169
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 239
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17725531
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/725531 | Method for accessing flash memory module and associated flash memory controller and electronic device | Apr 19, 2022 | Issued |
Array
(
[id] => 18480035
[patent_doc_number] => 11693775
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-07-04
[patent_title] => Adaptive cache
[patent_app_type] => utility
[patent_app_number] => 17/657922
[patent_app_country] => US
[patent_app_date] => 2022-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 24
[patent_no_of_words] => 21087
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17657922
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/657922 | Adaptive cache | Apr 3, 2022 | Issued |
Array
(
[id] => 20359053
[patent_doc_number] => 12475049
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-11-18
[patent_title] => Device, system and method for providing a high affinity snoop filter
[patent_app_type] => utility
[patent_app_number] => 17/705015
[patent_app_country] => US
[patent_app_date] => 2022-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 19
[patent_no_of_words] => 10782
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17705015
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/705015 | Device, system and method for providing a high affinity snoop filter | Mar 24, 2022 | Issued |
Array
(
[id] => 19243354
[patent_doc_number] => 12013793
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-06-18
[patent_title] => Memory address compression within an execution trace
[patent_app_type] => utility
[patent_app_number] => 18/548318
[patent_app_country] => US
[patent_app_date] => 2022-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 17562
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 245
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18548318
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/548318 | Memory address compression within an execution trace | Mar 20, 2022 | Issued |
Array
(
[id] => 19243354
[patent_doc_number] => 12013793
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-06-18
[patent_title] => Memory address compression within an execution trace
[patent_app_type] => utility
[patent_app_number] => 18/548318
[patent_app_country] => US
[patent_app_date] => 2022-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 17562
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 245
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18548318
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/548318 | Memory address compression within an execution trace | Mar 20, 2022 | Issued |
Array
(
[id] => 19243354
[patent_doc_number] => 12013793
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-06-18
[patent_title] => Memory address compression within an execution trace
[patent_app_type] => utility
[patent_app_number] => 18/548318
[patent_app_country] => US
[patent_app_date] => 2022-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 17562
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 245
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18548318
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/548318 | Memory address compression within an execution trace | Mar 20, 2022 | Issued |
Array
(
[id] => 19243354
[patent_doc_number] => 12013793
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-06-18
[patent_title] => Memory address compression within an execution trace
[patent_app_type] => utility
[patent_app_number] => 18/548318
[patent_app_country] => US
[patent_app_date] => 2022-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 17562
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 245
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18548318
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/548318 | Memory address compression within an execution trace | Mar 20, 2022 | Issued |
Array
(
[id] => 19092594
[patent_doc_number] => 11954043
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-09
[patent_title] => Memory system and method for controlling nonvolatile memory
[patent_app_type] => utility
[patent_app_number] => 17/689787
[patent_app_country] => US
[patent_app_date] => 2022-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 40
[patent_figures_cnt] => 60
[patent_no_of_words] => 27232
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17689787
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/689787 | Memory system and method for controlling nonvolatile memory | Mar 7, 2022 | Issued |
Array
(
[id] => 18889508
[patent_doc_number] => 11868278
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-09
[patent_title] => Block or page lock features in serial interface memory
[patent_app_type] => utility
[patent_app_number] => 17/679901
[patent_app_country] => US
[patent_app_date] => 2022-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 5347
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17679901
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/679901 | Block or page lock features in serial interface memory | Feb 23, 2022 | Issued |
Array
(
[id] => 19092583
[patent_doc_number] => 11954032
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-09
[patent_title] => Apparatus for managing buffers and method thereof
[patent_app_type] => utility
[patent_app_number] => 17/582033
[patent_app_country] => US
[patent_app_date] => 2022-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 3259
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17582033
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/582033 | Apparatus for managing buffers and method thereof | Jan 23, 2022 | Issued |
Array
(
[id] => 18826523
[patent_doc_number] => 11841799
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-12-12
[patent_title] => Graph neural network accelerator with attribute caching
[patent_app_type] => utility
[patent_app_number] => 17/581104
[patent_app_country] => US
[patent_app_date] => 2022-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 8550
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17581104
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/581104 | Graph neural network accelerator with attribute caching | Jan 20, 2022 | Issued |
Array
(
[id] => 18400990
[patent_doc_number] => 11663128
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2023-05-30
[patent_title] => Techniques for performing metadata updates for cache consistency
[patent_app_type] => utility
[patent_app_number] => 17/580157
[patent_app_country] => US
[patent_app_date] => 2022-01-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 26345
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 274
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17580157
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/580157 | Techniques for performing metadata updates for cache consistency | Jan 19, 2022 | Issued |
Array
(
[id] => 18750008
[patent_doc_number] => 11809319
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-11-07
[patent_title] => Contention tracking for processor cache management
[patent_app_type] => utility
[patent_app_number] => 17/580353
[patent_app_country] => US
[patent_app_date] => 2022-01-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 12510
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17580353
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/580353 | Contention tracking for processor cache management | Jan 19, 2022 | Issued |
Array
(
[id] => 17722250
[patent_doc_number] => 20220214972
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-07-07
[patent_title] => Integrated Circuit with 3D Partitioning
[patent_app_type] => utility
[patent_app_number] => 17/565594
[patent_app_country] => US
[patent_app_date] => 2021-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4414
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17565594
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/565594 | Integrated circuit with 3D partitioning | Dec 29, 2021 | Issued |
Array
(
[id] => 18471407
[patent_doc_number] => 20230205693
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-29
[patent_title] => LEVERAGING PROCESSING-IN-MEMORY (PIM) RESOURCES TO EXPEDITE NON-PIM INSTRUCTIONS EXECUTED ON A HOST
[patent_app_type] => utility
[patent_app_number] => 17/564155
[patent_app_country] => US
[patent_app_date] => 2021-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12252
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -26
[patent_words_short_claim] => 41
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17564155
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/564155 | Leveraging processing-in-memory (PIM) resources to expedite non-PIM instructions executed on a host | Dec 27, 2021 | Issued |
Array
(
[id] => 17690494
[patent_doc_number] => 20220197787
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-06-23
[patent_title] => DATA TIERING IN HETEROGENEOUS MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 17/559962
[patent_app_country] => US
[patent_app_date] => 2021-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9212
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17559962
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/559962 | Data tiering in heterogeneous memory system | Dec 21, 2021 | Issued |
Array
(
[id] => 19045202
[patent_doc_number] => 11934312
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-03-19
[patent_title] => On-demand scanning for changes in cloud object storage systems
[patent_app_type] => utility
[patent_app_number] => 17/543941
[patent_app_country] => US
[patent_app_date] => 2021-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 7365
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17543941
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/543941 | On-demand scanning for changes in cloud object storage systems | Dec 6, 2021 | Issued |
Array
(
[id] => 18407649
[patent_doc_number] => 20230169002
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-01
[patent_title] => USING A CONTAINER IMAGE TO DETERMINE A CACHING ALGORITHM FOR A SOFTWARE APPLICATION
[patent_app_type] => utility
[patent_app_number] => 17/538475
[patent_app_country] => US
[patent_app_date] => 2021-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4224
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17538475
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/538475 | Using a container image to determine a caching algorithm for a software application | Nov 29, 2021 | Issued |
Array
(
[id] => 17931931
[patent_doc_number] => 20220327056
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-13
[patent_title] => LOCK-FREE RING BUFFER
[patent_app_type] => utility
[patent_app_number] => 17/454475
[patent_app_country] => US
[patent_app_date] => 2021-11-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15083
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17454475
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/454475 | Lock-free ring buffer | Nov 9, 2021 | Issued |
Array
(
[id] => 17565232
[patent_doc_number] => 20220129381
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-04-28
[patent_title] => BLOCKCHAIN CACHE SYSTEM
[patent_app_type] => utility
[patent_app_number] => 17/518279
[patent_app_country] => US
[patent_app_date] => 2021-11-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10662
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17518279
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/518279 | BLOCKCHAIN CACHE SYSTEM | Nov 2, 2021 | Abandoned |