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Corey S. Faherty

Examiner (ID: 5369, Phone: (571)270-1319 , Office: P/2183 )

Most Active Art Unit
2183
Art Unit(s)
2183
Total Applications
1281
Issued Applications
1020
Pending Applications
72
Abandoned Applications
208

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20242789 [patent_doc_number] => 12423107 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-23 [patent_title] => Apparatus and method [patent_app_type] => utility [patent_app_number] => 18/442370 [patent_app_country] => US [patent_app_date] => 2024-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 29 [patent_no_of_words] => 9467 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18442370 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/442370
Apparatus and method Feb 14, 2024 Issued
Array ( [id] => 19911851 [patent_doc_number] => 12288062 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-29 [patent_title] => Instructions for fused multiply-add operations with variable precision input operands [patent_app_type] => utility [patent_app_number] => 18/399578 [patent_app_country] => US [patent_app_date] => 2023-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 29 [patent_no_of_words] => 13358 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18399578 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/399578
Instructions for fused multiply-add operations with variable precision input operands Dec 27, 2023 Issued
Array ( [id] => 19653494 [patent_doc_number] => 12175287 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-24 [patent_title] => Processor instruction dispatch configuration [patent_app_type] => utility [patent_app_number] => 18/389984 [patent_app_country] => US [patent_app_date] => 2023-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10273 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18389984 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/389984
Processor instruction dispatch configuration Dec 19, 2023 Issued
Array ( [id] => 20265773 [patent_doc_number] => 12436764 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-07 [patent_title] => Timing controller and display device including the same [patent_app_type] => utility [patent_app_number] => 18/545115 [patent_app_country] => US [patent_app_date] => 2023-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 2874 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18545115 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/545115
Timing controller and display device including the same Dec 18, 2023 Issued
Array ( [id] => 19458973 [patent_doc_number] => 12099462 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-09-24 [patent_title] => Dynamic processor architecture [patent_app_type] => utility [patent_app_number] => 18/534411 [patent_app_country] => US [patent_app_date] => 2023-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 17 [patent_no_of_words] => 15982 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18534411 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/534411
Dynamic processor architecture Dec 7, 2023 Issued
Array ( [id] => 19740218 [patent_doc_number] => 12217053 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Instructions and logic to perform floating point and integer operations for machine learning [patent_app_type] => utility [patent_app_number] => 18/528340 [patent_app_country] => US [patent_app_date] => 2023-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 50 [patent_figures_cnt] => 52 [patent_no_of_words] => 39570 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18528340 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/528340
Instructions and logic to perform floating point and integer operations for machine learning Dec 3, 2023 Issued
Array ( [id] => 19084737 [patent_doc_number] => 20240111538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => EFFICIENT PROCESSING OF NESTED LOOPS FOR COMPUTING DEVICE WITH MULTIPLE CONFIGURABLE PROCESSING ELEMENTS USING MULTIPLE SPOKE COUNTS [patent_app_type] => utility [patent_app_number] => 18/524942 [patent_app_country] => US [patent_app_date] => 2023-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19350 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18524942 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/524942
Efficient processing of nested loops for computing device with multiple configurable processing elements using multiple spoke counts Nov 29, 2023 Issued
Array ( [id] => 19005845 [patent_doc_number] => 20240069916 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => METHOD AND ELECTRONIC DEVICE FOR DISTRIBUTING PACKET FLOW [patent_app_type] => utility [patent_app_number] => 18/504651 [patent_app_country] => US [patent_app_date] => 2023-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6659 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18504651 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/504651
Method and electronic device for distributing packet flow Nov 7, 2023 Issued
Array ( [id] => 19780535 [patent_doc_number] => 12229569 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Methods and apparatus for deep learning network execution pipeline on multi-processor platform [patent_app_type] => utility [patent_app_number] => 18/384714 [patent_app_country] => US [patent_app_date] => 2023-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 43 [patent_no_of_words] => 31596 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18384714 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/384714
Methods and apparatus for deep learning network execution pipeline on multi-processor platform Oct 26, 2023 Issued
Array ( [id] => 20145589 [patent_doc_number] => 12379931 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-05 [patent_title] => Mechanism for instruction fusion [patent_app_type] => utility [patent_app_number] => 18/490640 [patent_app_country] => US [patent_app_date] => 2023-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 0 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18490640 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/490640
Mechanism for instruction fusion Oct 18, 2023 Issued
Array ( [id] => 19653495 [patent_doc_number] => 12175288 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-24 [patent_title] => Methods and systems for processing requests using load-dependent throttling [patent_app_type] => utility [patent_app_number] => 18/486254 [patent_app_country] => US [patent_app_date] => 2023-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 14711 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18486254 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/486254
Methods and systems for processing requests using load-dependent throttling Oct 12, 2023 Issued
Array ( [id] => 18925334 [patent_doc_number] => 20240028338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => HISTOGRAM OPERATION [patent_app_type] => utility [patent_app_number] => 18/479165 [patent_app_country] => US [patent_app_date] => 2023-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23945 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18479165 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/479165
HISTOGRAM OPERATION Oct 1, 2023 Pending
Array ( [id] => 20528971 [patent_doc_number] => 12547406 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-10 [patent_title] => Look-up table read [patent_app_type] => utility [patent_app_number] => 18/477657 [patent_app_country] => US [patent_app_date] => 2023-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 40 [patent_no_of_words] => 18531 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18477657 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/477657
Look-up table read Sep 28, 2023 Issued
Array ( [id] => 19878625 [patent_doc_number] => 20250110882 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-03 [patent_title] => BRANCH TARGET BUFFER RUN-AHEAD [patent_app_type] => utility [patent_app_number] => 18/374273 [patent_app_country] => US [patent_app_date] => 2023-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11337 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18374273 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/374273
BRANCH TARGET BUFFER RUN-AHEAD Sep 27, 2023 Pending
Array ( [id] => 20273628 [patent_doc_number] => 12443410 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-14 [patent_title] => Decoding method of simultaneously multi-threading processor, processor, and chip [patent_app_type] => utility [patent_app_number] => 18/833997 [patent_app_country] => US [patent_app_date] => 2023-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 6966 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18833997 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/833997
Decoding method of simultaneously multi-threading processor, processor, and chip Sep 12, 2023 Issued
Array ( [id] => 20215039 [patent_doc_number] => 12411692 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-09 [patent_title] => Storage of prediction-related data [patent_app_type] => utility [patent_app_number] => 18/462742 [patent_app_country] => US [patent_app_date] => 2023-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 22 [patent_no_of_words] => 13602 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18462742 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/462742
Storage of prediction-related data Sep 6, 2023 Issued
Array ( [id] => 18864328 [patent_doc_number] => 20230418764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => TRACKING STREAMING ENGINE VECTOR PREDICATES TO CONTROL PROCESSOR EXECUTION [patent_app_type] => utility [patent_app_number] => 18/460772 [patent_app_country] => US [patent_app_date] => 2023-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29594 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18460772 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/460772
Tracking streaming engine vector predicates to control processor execution Sep 4, 2023 Issued
Array ( [id] => 19740294 [patent_doc_number] => 12217130 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Apparatus and method for scalable qubit addressing [patent_app_type] => utility [patent_app_number] => 18/231917 [patent_app_country] => US [patent_app_date] => 2023-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 23 [patent_no_of_words] => 12762 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18231917 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/231917
Apparatus and method for scalable qubit addressing Aug 8, 2023 Issued
Array ( [id] => 18959932 [patent_doc_number] => 20240048259 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => Semiconductor device system [patent_app_type] => utility [patent_app_number] => 18/230543 [patent_app_country] => US [patent_app_date] => 2023-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25754 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18230543 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/230543
Semiconductor device system Aug 3, 2023 Pending
Array ( [id] => 19780534 [patent_doc_number] => 12229568 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Methods and circuitry for efficient management of local branch history registers [patent_app_type] => utility [patent_app_number] => 18/365418 [patent_app_country] => US [patent_app_date] => 2023-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 8354 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18365418 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/365418
Methods and circuitry for efficient management of local branch history registers Aug 3, 2023 Issued
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