Search

Corey S. Faherty

Examiner (ID: 5369, Phone: (571)270-1319 , Office: P/2183 )

Most Active Art Unit
2183
Art Unit(s)
2183
Total Applications
1281
Issued Applications
1020
Pending Applications
72
Abandoned Applications
208

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19780528 [patent_doc_number] => 12229561 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-02-18 [patent_title] => Processing of data synchronization barrier instructions [patent_app_type] => utility [patent_app_number] => 17/933037 [patent_app_country] => US [patent_app_date] => 2022-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 18144 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17933037 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/933037
Processing of data synchronization barrier instructions Sep 15, 2022 Issued
Array ( [id] => 19327924 [patent_doc_number] => 12045612 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-23 [patent_title] => Special-purpose digital-compute hardware for efficient element-wise aggregation, scaling and offset [patent_app_type] => utility [patent_app_number] => 17/931537 [patent_app_country] => US [patent_app_date] => 2022-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4266 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17931537 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/931537
Special-purpose digital-compute hardware for efficient element-wise aggregation, scaling and offset Sep 11, 2022 Issued
Array ( [id] => 18160632 [patent_doc_number] => 20230027224 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => SINGLE INSTRUCTION MULTIPLE DATA SIMD INSTRUCTION GENERATION AND PROCESSING METHOD AND RELATED DEVICE [patent_app_type] => utility [patent_app_number] => 17/942424 [patent_app_country] => US [patent_app_date] => 2022-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29849 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17942424 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/942424
Single instruction multiple data SIMD instruction generation and processing method and related device Sep 11, 2022 Issued
Array ( [id] => 19122750 [patent_doc_number] => 11966739 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-23 [patent_title] => Processing of issued instructions [patent_app_type] => utility [patent_app_number] => 17/941387 [patent_app_country] => US [patent_app_date] => 2022-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 13482 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17941387 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/941387
Processing of issued instructions Sep 8, 2022 Issued
Array ( [id] => 19167625 [patent_doc_number] => 11983534 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-14 [patent_title] => Calculation method and related product [patent_app_type] => utility [patent_app_number] => 17/929730 [patent_app_country] => US [patent_app_date] => 2022-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 65 [patent_figures_cnt] => 121 [patent_no_of_words] => 62317 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 305 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17929730 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/929730
Calculation method and related product Sep 4, 2022 Issued
Array ( [id] => 18095522 [patent_doc_number] => 20220413863 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => LOOK-UP TABLE READ [patent_app_type] => utility [patent_app_number] => 17/901940 [patent_app_country] => US [patent_app_date] => 2022-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23523 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17901940 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/901940
Look-up table read Sep 1, 2022 Issued
Array ( [id] => 19005887 [patent_doc_number] => 20240069958 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => MECHANISM TO HANDLE BREAKPOINTS IN A MULTI-ELEMENT PROCESSOR [patent_app_type] => utility [patent_app_number] => 17/899710 [patent_app_country] => US [patent_app_date] => 2022-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20069 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17899710 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/899710
Mechanism to handle breakpoints in a multi-element processor Aug 30, 2022 Issued
Array ( [id] => 18310825 [patent_doc_number] => 20230114725 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => METHODS AND APPARATUS FOR DEEP LEARNING NETWORK EXECUTION PIPELINE ON MULTI-PROCESSOR PLATFORM [patent_app_type] => utility [patent_app_number] => 17/887964 [patent_app_country] => US [patent_app_date] => 2022-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 31601 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17887964 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/887964
Methods and apparatus for deep learning network execution pipeline on multi-processor platform Aug 14, 2022 Issued
Array ( [id] => 18957352 [patent_doc_number] => 20240045679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => METHOD FOR CONTROL FLOW ISOLATION WITH PROTECTION KEYS AND INDIRECT BRANCH TRACKING [patent_app_type] => utility [patent_app_number] => 17/882007 [patent_app_country] => US [patent_app_date] => 2022-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10041 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -30 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17882007 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/882007
Method for control flow isolation with protection keys and indirect branch tracking Aug 4, 2022 Issued
Array ( [id] => 18981987 [patent_doc_number] => 11907160 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-20 [patent_title] => Distributed processor system [patent_app_type] => utility [patent_app_number] => 17/817811 [patent_app_country] => US [patent_app_date] => 2022-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10538 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17817811 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/817811
Distributed processor system Aug 4, 2022 Issued
Array ( [id] => 18889996 [patent_doc_number] => 11868769 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-01-09 [patent_title] => Automatically determining and modifying environments for running microservices in a performant and cost-effective manner [patent_app_type] => utility [patent_app_number] => 17/874285 [patent_app_country] => US [patent_app_date] => 2022-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5343 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17874285 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/874285
Automatically determining and modifying environments for running microservices in a performant and cost-effective manner Jul 26, 2022 Issued
Array ( [id] => 18177051 [patent_doc_number] => 20230037780 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => COMPUTING DEVICE WITH ONE OR MORE HARDWARE ACCELERATORS DIRECTLY COUPLED WITH CLUSTER OF PROCESSORS [patent_app_type] => utility [patent_app_number] => 17/870572 [patent_app_country] => US [patent_app_date] => 2022-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14445 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17870572 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/870572
COMPUTING DEVICE WITH ONE OR MORE HARDWARE ACCELERATORS DIRECTLY COUPLED WITH CLUSTER OF PROCESSORS Jul 20, 2022 Abandoned
Array ( [id] => 18158079 [patent_doc_number] => 20230024670 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => DETERMINISTIC MEMORY FOR TENSOR STREAMING PROCESSORS [patent_app_type] => utility [patent_app_number] => 17/858493 [patent_app_country] => US [patent_app_date] => 2022-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19008 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17858493 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/858493
Deterministic memory for tensor streaming processors Jul 5, 2022 Issued
Array ( [id] => 18881295 [patent_doc_number] => 20240004664 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => SPLIT REGISTER LIST FOR RENAMING [patent_app_type] => utility [patent_app_number] => 17/855727 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9598 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17855727 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/855727
Split register list for renaming Jun 29, 2022 Issued
Array ( [id] => 19963798 [patent_doc_number] => 12333307 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-17 [patent_title] => Approach for managing near-memory processing commands from multiple processor threads to prevent interference at near-memory processing elements [patent_app_type] => utility [patent_app_number] => 17/853613 [patent_app_country] => US [patent_app_date] => 2022-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 1169 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17853613 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/853613
Approach for managing near-memory processing commands from multiple processor threads to prevent interference at near-memory processing elements Jun 28, 2022 Issued
Array ( [id] => 18864164 [patent_doc_number] => 20230418600 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => NON-VOLATILE MEMORY DIE WITH LATCH-BASED MULTIPLY-ACCUMULATE COMPONENTS [patent_app_type] => utility [patent_app_number] => 17/847039 [patent_app_country] => US [patent_app_date] => 2022-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16804 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17847039 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/847039
Non-volatile memory die with latch-based multiply-accumulate components Jun 21, 2022 Issued
Array ( [id] => 18864243 [patent_doc_number] => 20230418679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => PROCESSING UNIT VIRTUALIZATION WITH SCALABLE OVER-PROVISIONING IN AN INFORMATION PROCESSING SYSTEM [patent_app_type] => utility [patent_app_number] => 17/846309 [patent_app_country] => US [patent_app_date] => 2022-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5919 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17846309 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/846309
Processing unit virtualization with scalable over-provisioning in an information processing system Jun 21, 2022 Issued
Array ( [id] => 20454675 [patent_doc_number] => 12517728 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-06 [patent_title] => Instructions and support for calculating prefix sums [patent_app_type] => utility [patent_app_number] => 17/843823 [patent_app_country] => US [patent_app_date] => 2022-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 36 [patent_no_of_words] => 23179 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17843823 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/843823
Instructions and support for calculating prefix sums Jun 16, 2022 Issued
Array ( [id] => 18547003 [patent_doc_number] => 11720355 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-08 [patent_title] => Instructions and logic to perform floating point and integer operations for machine learning [patent_app_type] => utility [patent_app_number] => 17/834482 [patent_app_country] => US [patent_app_date] => 2022-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 50 [patent_figures_cnt] => 52 [patent_no_of_words] => 39591 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17834482 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/834482
Instructions and logic to perform floating point and integer operations for machine learning Jun 6, 2022 Issued
Array ( [id] => 18644620 [patent_doc_number] => 11768688 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-09-26 [patent_title] => Methods and circuitry for efficient management of local branch history registers [patent_app_type] => utility [patent_app_number] => 17/831116 [patent_app_country] => US [patent_app_date] => 2022-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 8311 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17831116 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/831116
Methods and circuitry for efficient management of local branch history registers Jun 1, 2022 Issued
Menu