Search

Courtney Bowers

Examiner (ID: 14703)

Most Active Art Unit
2503
Art Unit(s)
2503, 2899, 2815
Total Applications
385
Issued Applications
275
Pending Applications
14
Abandoned Applications
96

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3606650 [patent_doc_number] => 05578847 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-26 [patent_title] => 'Dynamic semiconductor memory device with higher density bit line/word line layout' [patent_app_type] => 1 [patent_app_number] => 8/402570 [patent_app_country] => US [patent_app_date] => 1995-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 24 [patent_no_of_words] => 4179 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/578/05578847.pdf [firstpage_image] =>[orig_patent_app_number] => 402570 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/402570
Dynamic semiconductor memory device with higher density bit line/word line layout Mar 12, 1995 Issued
Array ( [id] => 3662928 [patent_doc_number] => 05592003 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-07 [patent_title] => 'Nonvolatile semiconductor memory and method of rewriting data thereto' [patent_app_type] => 1 [patent_app_number] => 8/390160 [patent_app_country] => US [patent_app_date] => 1995-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 24 [patent_no_of_words] => 11507 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 710 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/592/05592003.pdf [firstpage_image] =>[orig_patent_app_number] => 390160 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/390160
Nonvolatile semiconductor memory and method of rewriting data thereto Feb 16, 1995 Issued
Array ( [id] => 3638096 [patent_doc_number] => 05610425 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-11 [patent_title] => 'Input/output electrostatic discharge protection circuit for an integrated circuit' [patent_app_type] => 1 [patent_app_number] => 8/384047 [patent_app_country] => US [patent_app_date] => 1995-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4784 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 365 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/610/05610425.pdf [firstpage_image] =>[orig_patent_app_number] => 384047 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/384047
Input/output electrostatic discharge protection circuit for an integrated circuit Feb 5, 1995 Issued
Array ( [id] => 3651762 [patent_doc_number] => 05637910 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-10 [patent_title] => 'Multi-emitter or a multi-base transistor' [patent_app_type] => 1 [patent_app_number] => 8/382393 [patent_app_country] => US [patent_app_date] => 1995-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 6466 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/637/05637910.pdf [firstpage_image] =>[orig_patent_app_number] => 382393 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/382393
Multi-emitter or a multi-base transistor Jan 31, 1995 Issued
Array ( [id] => 3628630 [patent_doc_number] => 05615027 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-25 [patent_title] => 'Liquid crystal apparatus and display system' [patent_app_type] => 1 [patent_app_number] => 8/375181 [patent_app_country] => US [patent_app_date] => 1995-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 41 [patent_no_of_words] => 8996 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 17 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/615/05615027.pdf [firstpage_image] =>[orig_patent_app_number] => 375181 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/375181
Liquid crystal apparatus and display system Jan 17, 1995 Issued
08/365951 SRAM CELL HAVING THIN FILM TRANSISTORS AS LOADS Dec 28, 1994 Abandoned
Array ( [id] => 3592023 [patent_doc_number] => 05550388 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-08-27 [patent_title] => 'Heterojunction FET having barrier layer consisting of two layers between channel and buffer layers' [patent_app_type] => 1 [patent_app_number] => 8/359905 [patent_app_country] => US [patent_app_date] => 1994-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3122 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/550/05550388.pdf [firstpage_image] =>[orig_patent_app_number] => 359905 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/359905
Heterojunction FET having barrier layer consisting of two layers between channel and buffer layers Dec 19, 1994 Issued
Array ( [id] => 3571021 [patent_doc_number] => 05485032 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-16 [patent_title] => 'Antifuse element with electrical or optical programming' [patent_app_type] => 1 [patent_app_number] => 8/355206 [patent_app_country] => US [patent_app_date] => 1994-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3593 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/485/05485032.pdf [firstpage_image] =>[orig_patent_app_number] => 355206 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/355206
Antifuse element with electrical or optical programming Dec 7, 1994 Issued
Array ( [id] => 3559283 [patent_doc_number] => 05543654 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-08-06 [patent_title] => 'Contoured-tub fermi-threshold field effect transistor and method of forming same' [patent_app_type] => 1 [patent_app_number] => 8/351643 [patent_app_country] => US [patent_app_date] => 1994-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 35 [patent_no_of_words] => 12117 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/543/05543654.pdf [firstpage_image] =>[orig_patent_app_number] => 351643 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/351643
Contoured-tub fermi-threshold field effect transistor and method of forming same Dec 6, 1994 Issued
08/348507 IMAGE SENSOR Nov 30, 1994 Abandoned
Array ( [id] => 3653254 [patent_doc_number] => 05640039 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-17 [patent_title] => 'Conductive plane beneath suspended microstructure' [patent_app_type] => 1 [patent_app_number] => 8/347702 [patent_app_country] => US [patent_app_date] => 1994-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1632 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/640/05640039.pdf [firstpage_image] =>[orig_patent_app_number] => 347702 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/347702
Conductive plane beneath suspended microstructure Nov 30, 1994 Issued
Array ( [id] => 3480102 [patent_doc_number] => 05432373 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-07-11 [patent_title] => 'Magnetic spin transistor' [patent_app_type] => 1 [patent_app_number] => 8/346329 [patent_app_country] => US [patent_app_date] => 1994-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 6530 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/432/05432373.pdf [firstpage_image] =>[orig_patent_app_number] => 346329 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/346329
Magnetic spin transistor Nov 28, 1994 Issued
Array ( [id] => 3592532 [patent_doc_number] => 05517038 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-14 [patent_title] => 'Semiconductor device including three-dimensionally disposed logic elements for improving degree of integration' [patent_app_type] => 1 [patent_app_number] => 8/348211 [patent_app_country] => US [patent_app_date] => 1994-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 50 [patent_no_of_words] => 7798 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/517/05517038.pdf [firstpage_image] =>[orig_patent_app_number] => 348211 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/348211
Semiconductor device including three-dimensionally disposed logic elements for improving degree of integration Nov 27, 1994 Issued
Array ( [id] => 3626495 [patent_doc_number] => 05594259 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-14 [patent_title] => 'Semiconductor device and a method for producing the same' [patent_app_type] => 1 [patent_app_number] => 8/338195 [patent_app_country] => US [patent_app_date] => 1994-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 7457 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/594/05594259.pdf [firstpage_image] =>[orig_patent_app_number] => 338195 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/338195
Semiconductor device and a method for producing the same Nov 8, 1994 Issued
Array ( [id] => 3476067 [patent_doc_number] => 05477066 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-12-19 [patent_title] => 'Heterojunction bipolar transistor' [patent_app_type] => 1 [patent_app_number] => 8/330739 [patent_app_country] => US [patent_app_date] => 1994-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 92 [patent_no_of_words] => 12244 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/477/05477066.pdf [firstpage_image] =>[orig_patent_app_number] => 330739 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/330739
Heterojunction bipolar transistor Oct 27, 1994 Issued
Array ( [id] => 3514955 [patent_doc_number] => 05563438 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-08 [patent_title] => 'Rugged CMOS output stage design' [patent_app_type] => 1 [patent_app_number] => 8/329753 [patent_app_country] => US [patent_app_date] => 1994-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2765 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 411 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/563/05563438.pdf [firstpage_image] =>[orig_patent_app_number] => 329753 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/329753
Rugged CMOS output stage design Oct 25, 1994 Issued
Array ( [id] => 3596030 [patent_doc_number] => 05521419 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-28 [patent_title] => 'Semiconductor device having field shield element isolating structure and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 8/327341 [patent_app_country] => US [patent_app_date] => 1994-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 21 [patent_no_of_words] => 4501 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/521/05521419.pdf [firstpage_image] =>[orig_patent_app_number] => 327341 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/327341
Semiconductor device having field shield element isolating structure and method of manufacturing the same Oct 20, 1994 Issued
Array ( [id] => 3478498 [patent_doc_number] => 05428229 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-06-27 [patent_title] => 'Pressure contact type MOS semiconductor device and fabrication method of the same' [patent_app_type] => 1 [patent_app_number] => 8/323697 [patent_app_country] => US [patent_app_date] => 1994-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 32 [patent_no_of_words] => 9669 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/428/05428229.pdf [firstpage_image] =>[orig_patent_app_number] => 323697 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/323697
Pressure contact type MOS semiconductor device and fabrication method of the same Oct 17, 1994 Issued
Array ( [id] => 3606874 [patent_doc_number] => 05578862 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-26 [patent_title] => 'Semiconductor integrated circuit with layer for isolating elements in substrate' [patent_app_type] => 1 [patent_app_number] => 8/322374 [patent_app_country] => US [patent_app_date] => 1994-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3607 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/578/05578862.pdf [firstpage_image] =>[orig_patent_app_number] => 322374 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/322374
Semiconductor integrated circuit with layer for isolating elements in substrate Oct 12, 1994 Issued
Array ( [id] => 3544029 [patent_doc_number] => 05481131 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-02 [patent_title] => 'Integrated circuit having passive circuit elements' [patent_app_type] => 1 [patent_app_number] => 8/287336 [patent_app_country] => US [patent_app_date] => 1994-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 4444 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/481/05481131.pdf [firstpage_image] =>[orig_patent_app_number] => 287336 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/287336
Integrated circuit having passive circuit elements Sep 28, 1994 Issued
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