
Courtney L. Smith
Examiner (ID: 14799, Phone: (571)272-9094 , Office: P/2835 )
| Most Active Art Unit | 2835 |
| Art Unit(s) | 2809, 2835 |
| Total Applications | 1615 |
| Issued Applications | 1337 |
| Pending Applications | 95 |
| Abandoned Applications | 217 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19305797
[patent_doc_number] => 20240234377
[patent_country] => US
[patent_kind] => A9
[patent_issue_date] => 2024-07-11
[patent_title] => SEMICONDUCTOR PACKAGES
[patent_app_type] => utility
[patent_app_number] => 18/536332
[patent_app_country] => US
[patent_app_date] => 2023-12-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11115
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18536332
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/536332 | Semiconductor packages | Dec 11, 2023 | Issued |
Array
(
[id] => 19305797
[patent_doc_number] => 20240234377
[patent_country] => US
[patent_kind] => A9
[patent_issue_date] => 2024-07-11
[patent_title] => SEMICONDUCTOR PACKAGES
[patent_app_type] => utility
[patent_app_number] => 18/536332
[patent_app_country] => US
[patent_app_date] => 2023-12-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11115
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18536332
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/536332 | Semiconductor packages | Dec 11, 2023 | Issued |
Array
(
[id] => 19071223
[patent_doc_number] => 20240105649
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-28
[patent_title] => ELECTRONIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/536254
[patent_app_country] => US
[patent_app_date] => 2023-12-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10208
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18536254
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/536254 | Electronic device including conductive element on side surface of substrate | Dec 11, 2023 | Issued |
Array
(
[id] => 19237584
[patent_doc_number] => 20240194779
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-13
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF PRODUCING THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/522816
[patent_app_country] => US
[patent_app_date] => 2023-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9479
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18522816
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/522816 | SEMICONDUCTOR DEVICE AND METHOD OF PRODUCING THEREOF | Nov 28, 2023 | Pending |
Array
(
[id] => 19790199
[patent_doc_number] => 20250063878
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-20
[patent_title] => DISPLAY PANEL AND DISPLAY APPARATUS
[patent_app_type] => utility
[patent_app_number] => 18/518996
[patent_app_country] => US
[patent_app_date] => 2023-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7395
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18518996
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/518996 | DISPLAY PANEL AND DISPLAY APPARATUS | Nov 25, 2023 | Pending |
Array
(
[id] => 20216216
[patent_doc_number] => 12412871
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-09-09
[patent_title] => Semiconductor package utilizing a hybrid bonding process and method of manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 18/518591
[patent_app_country] => US
[patent_app_date] => 2023-11-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 19
[patent_no_of_words] => 4420
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18518591
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/518591 | Semiconductor package utilizing a hybrid bonding process and method of manufacturing the same | Nov 22, 2023 | Issued |
Array
(
[id] => 19926351
[patent_doc_number] => 12300646
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-05-13
[patent_title] => Chiplets
[patent_app_type] => utility
[patent_app_number] => 18/517774
[patent_app_country] => US
[patent_app_date] => 2023-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 21
[patent_no_of_words] => 2128
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18517774
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/517774 | Chiplets | Nov 21, 2023 | Issued |
Array
(
[id] => 19040427
[patent_doc_number] => 20240090242
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-14
[patent_title] => 3D MEMORY DEVICES AND STRUCTURES WITH METAL LAYERS
[patent_app_type] => utility
[patent_app_number] => 18/388840
[patent_app_country] => US
[patent_app_date] => 2023-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 40173
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18388840
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/388840 | 3D memory devices and structures with metal layers | Nov 11, 2023 | Issued |
Array
(
[id] => 19007808
[patent_doc_number] => 20240071879
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-29
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/500653
[patent_app_country] => US
[patent_app_date] => 2023-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19081
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18500653
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/500653 | SEMICONDUCTOR DEVICE | Nov 1, 2023 | Pending |
Array
(
[id] => 19720369
[patent_doc_number] => 12205912
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-21
[patent_title] => Semiconductor package structure and method for preparing the same
[patent_app_type] => utility
[patent_app_number] => 18/381911
[patent_app_country] => US
[patent_app_date] => 2023-10-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 8199
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18381911
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/381911 | Semiconductor package structure and method for preparing the same | Oct 18, 2023 | Issued |
Array
(
[id] => 19858291
[patent_doc_number] => 12261142
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-03-25
[patent_title] => Semiconductor structure including thermal enhanced bonding structure
[patent_app_type] => utility
[patent_app_number] => 18/489016
[patent_app_country] => US
[patent_app_date] => 2023-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 42
[patent_no_of_words] => 17044
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18489016
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/489016 | Semiconductor structure including thermal enhanced bonding structure | Oct 17, 2023 | Issued |
Array
(
[id] => 19007803
[patent_doc_number] => 20240071874
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-29
[patent_title] => SEMICONDUCTOR CHIP INCLUDING THROUGH ELECTRODE, AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/489557
[patent_app_country] => US
[patent_app_date] => 2023-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8623
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18489557
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/489557 | Semiconductor chip including through electrode, and semiconductor package including the same | Oct 17, 2023 | Issued |
Array
(
[id] => 19823240
[patent_doc_number] => 20250081447
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-06
[patent_title] => MANAGING VERTICAL STRUCTURES IN THREE-DIMENSIONAL SEMICONDUCTIVE DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/488689
[patent_app_country] => US
[patent_app_date] => 2023-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15720
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18488689
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/488689 | MANAGING VERTICAL STRUCTURES IN THREE-DIMENSIONAL SEMICONDUCTIVE DEVICES | Oct 16, 2023 | Pending |
Array
(
[id] => 19131082
[patent_doc_number] => 20240136435
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-25
[patent_title] => FIELD-EFFECT TRANSISTOR, AND METHODS FOR PRODUCTION
[patent_app_type] => utility
[patent_app_number] => 18/488741
[patent_app_country] => US
[patent_app_date] => 2023-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5324
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18488741
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/488741 | FIELD-EFFECT TRANSISTOR, AND METHODS FOR PRODUCTION | Oct 16, 2023 | Pending |
Array
(
[id] => 19796329
[patent_doc_number] => 12237299
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-02-25
[patent_title] => Systems and methods for direct bonding in semiconductor die manufacturing
[patent_app_type] => utility
[patent_app_number] => 18/380863
[patent_app_country] => US
[patent_app_date] => 2023-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 6733
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18380863
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/380863 | Systems and methods for direct bonding in semiconductor die manufacturing | Oct 16, 2023 | Issued |
Array
(
[id] => 19760059
[patent_doc_number] => 20250048624
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-06
[patent_title] => COMPACT EFUSE STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 18/488805
[patent_app_country] => US
[patent_app_date] => 2023-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7831
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18488805
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/488805 | COMPACT EFUSE STRUCTURE | Oct 16, 2023 | Pending |
Array
(
[id] => 19131082
[patent_doc_number] => 20240136435
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-25
[patent_title] => FIELD-EFFECT TRANSISTOR, AND METHODS FOR PRODUCTION
[patent_app_type] => utility
[patent_app_number] => 18/488741
[patent_app_country] => US
[patent_app_date] => 2023-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5324
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18488741
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/488741 | FIELD-EFFECT TRANSISTOR, AND METHODS FOR PRODUCTION | Oct 15, 2023 | Pending |
Array
(
[id] => 19926375
[patent_doc_number] => 12300671
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-05-13
[patent_title] => Semiconductor packages and methods of manufacturing the semiconductor packages
[patent_app_type] => utility
[patent_app_number] => 18/487247
[patent_app_country] => US
[patent_app_date] => 2023-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 3349
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 220
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18487247
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/487247 | Semiconductor packages and methods of manufacturing the semiconductor packages | Oct 15, 2023 | Issued |
Array
(
[id] => 20216158
[patent_doc_number] => 12412812
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-09-09
[patent_title] => Semiconductor package with plurality of leads and sealing resin
[patent_app_type] => utility
[patent_app_number] => 18/485318
[patent_app_country] => US
[patent_app_date] => 2023-10-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 29
[patent_no_of_words] => 6531
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 242
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18485318
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/485318 | Semiconductor package with plurality of leads and sealing resin | Oct 11, 2023 | Issued |
Array
(
[id] => 19414826
[patent_doc_number] => 12080663
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-09-03
[patent_title] => Semiconductor devices including a thick metal layer and a bump
[patent_app_type] => utility
[patent_app_number] => 18/377530
[patent_app_country] => US
[patent_app_date] => 2023-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 22
[patent_no_of_words] => 8754
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 313
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18377530
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/377530 | Semiconductor devices including a thick metal layer and a bump | Oct 5, 2023 | Issued |