
Craig Thompson
Examiner (ID: 2411)
| Most Active Art Unit | 2813 |
| Art Unit(s) | 2811, 2812, 2813, 3999 |
| Total Applications | 616 |
| Issued Applications | 589 |
| Pending Applications | 10 |
| Abandoned Applications | 17 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1418754
[patent_doc_number] => 06506621
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-01-14
[patent_title] => 'Method for producing a diaphragm sensor array and diaphragm sensor array'
[patent_app_type] => B1
[patent_app_number] => 10/016026
[patent_app_country] => US
[patent_app_date] => 2001-12-12
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/506/06506621.pdf
[firstpage_image] =>[orig_patent_app_number] => 10016026
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/016026 | Method for producing a diaphragm sensor array and diaphragm sensor array | Dec 11, 2001 | Issued |
Array
(
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[patent_doc_number] => 20030109119
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[patent_kind] => A1
[patent_issue_date] => 2003-06-12
[patent_title] => 'FABRICATION OF ULTRA SHALLOW JUNCTIONS FROM A SOLID SOURCE WITH FLUORINE IMPLANTATION'
[patent_app_type] => new
[patent_app_number] => 10/020813
[patent_app_country] => US
[patent_app_date] => 2001-12-12
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Array
(
[id] => 6696875
[patent_doc_number] => 20030109069
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[patent_kind] => A1
[patent_issue_date] => 2003-06-12
[patent_title] => 'Seed layer processes for MOCVD of ferroelectric thin films on high-k gate oxides'
[patent_app_type] => new
[patent_app_number] => 10/020868
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[patent_app_date] => 2001-12-12
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/020868 | Seed layer processes for MOCVD of ferroelectric thin films on high-k gate oxides | Dec 11, 2001 | Issued |
Array
(
[id] => 5828742
[patent_doc_number] => 20020068421
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[patent_kind] => A1
[patent_issue_date] => 2002-06-06
[patent_title] => 'Method of fabricating a semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/001785
[patent_app_country] => US
[patent_app_date] => 2001-12-05
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/001785 | Method of fabricating a semiconductor device | Dec 4, 2001 | Issued |
Array
(
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[patent_doc_number] => 06794290
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[patent_kind] => B1
[patent_issue_date] => 2004-09-21
[patent_title] => 'Method of chemical modification of structure topography'
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[patent_app_number] => 10/004386
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[firstpage_image] =>[orig_patent_app_number] => 10004386
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/004386 | Method of chemical modification of structure topography | Dec 2, 2001 | Issued |
Array
(
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[patent_issue_date] => 2002-07-23
[patent_title] => 'Transistor metal gate structure that minimizes non-planarity effects and method of formation'
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Array
(
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[patent_issue_date] => 2003-11-18
[patent_title] => 'Production method for semiconductor crystal'
[patent_app_type] => B2
[patent_app_number] => 09/979258
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/979258 | Production method for semiconductor crystal | Nov 20, 2001 | Issued |
Array
(
[id] => 6123578
[patent_doc_number] => 20020074656
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[patent_issue_date] => 2002-06-20
[patent_title] => 'Semiconductor device and a method of manufacturing the same'
[patent_app_type] => new
[patent_app_number] => 09/988684
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[patent_app_date] => 2001-11-20
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[firstpage_image] =>[orig_patent_app_number] => 09988684
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/988684 | Semiconductor device | Nov 19, 2001 | Issued |
Array
(
[id] => 1502274
[patent_doc_number] => 06486510
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[patent_issue_date] => 2002-11-26
[patent_title] => 'Reduction of reverse short channel effects by implantation of neutral dopants'
[patent_app_type] => B2
[patent_app_number] => 10/054297
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/054297 | Reduction of reverse short channel effects by implantation of neutral dopants | Nov 11, 2001 | Issued |
Array
(
[id] => 5859192
[patent_doc_number] => 20020123169
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[patent_issue_date] => 2002-09-05
[patent_title] => 'Methods of forming non-volatile resistance variable devices, and non-volatile resistance variable devices'
[patent_app_type] => new
[patent_app_number] => 09/999883
[patent_app_country] => US
[patent_app_date] => 2001-10-31
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[pdf_file] => publications/A1/0123/20020123169.pdf
[firstpage_image] =>[orig_patent_app_number] => 09999883
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/999883 | Method of forming a chalcogenide comprising device | Oct 30, 2001 | Issued |
Array
(
[id] => 1299410
[patent_doc_number] => 06623991
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[patent_issue_date] => 2003-09-23
[patent_title] => 'Method of measuring meso-scale structures on wafers'
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[patent_app_number] => 09/999410
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Array
(
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Array
(
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Array
(
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Array
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/399806 | Three-terminal field-controlled molecular devices | Oct 23, 2001 | Abandoned |
Array
(
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[patent_title] => 'Sidewalls as semiconductor etch stop and diffusion barrier'
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Array
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