Search

Craig Thompson

Examiner (ID: 2411)

Most Active Art Unit
2813
Art Unit(s)
2811, 2812, 2813, 3999
Total Applications
616
Issued Applications
589
Pending Applications
10
Abandoned Applications
17

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1418754 [patent_doc_number] => 06506621 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-14 [patent_title] => 'Method for producing a diaphragm sensor array and diaphragm sensor array' [patent_app_type] => B1 [patent_app_number] => 10/016026 [patent_app_country] => US [patent_app_date] => 2001-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 3234 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/506/06506621.pdf [firstpage_image] =>[orig_patent_app_number] => 10016026 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/016026
Method for producing a diaphragm sensor array and diaphragm sensor array Dec 11, 2001 Issued
Array ( [id] => 6696925 [patent_doc_number] => 20030109119 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-12 [patent_title] => 'FABRICATION OF ULTRA SHALLOW JUNCTIONS FROM A SOLID SOURCE WITH FLUORINE IMPLANTATION' [patent_app_type] => new [patent_app_number] => 10/020813 [patent_app_country] => US [patent_app_date] => 2001-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3915 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20030109119.pdf [firstpage_image] =>[orig_patent_app_number] => 10020813 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/020813
Fabrication of ultra shallow junctions from a solid source with fluorine implantation Dec 11, 2001 Issued
Array ( [id] => 6696875 [patent_doc_number] => 20030109069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-12 [patent_title] => 'Seed layer processes for MOCVD of ferroelectric thin films on high-k gate oxides' [patent_app_type] => new [patent_app_number] => 10/020868 [patent_app_country] => US [patent_app_date] => 2001-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1987 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20030109069.pdf [firstpage_image] =>[orig_patent_app_number] => 10020868 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/020868
Seed layer processes for MOCVD of ferroelectric thin films on high-k gate oxides Dec 11, 2001 Issued
Array ( [id] => 5828742 [patent_doc_number] => 20020068421 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-06 [patent_title] => 'Method of fabricating a semiconductor device' [patent_app_type] => new [patent_app_number] => 10/001785 [patent_app_country] => US [patent_app_date] => 2001-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 17216 [patent_no_of_claims] => 103 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20020068421.pdf [firstpage_image] =>[orig_patent_app_number] => 10001785 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/001785
Method of fabricating a semiconductor device Dec 4, 2001 Issued
Array ( [id] => 1123459 [patent_doc_number] => 06794290 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-21 [patent_title] => 'Method of chemical modification of structure topography' [patent_app_type] => B1 [patent_app_number] => 10/004386 [patent_app_country] => US [patent_app_date] => 2001-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 4859 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/794/06794290.pdf [firstpage_image] =>[orig_patent_app_number] => 10004386 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/004386
Method of chemical modification of structure topography Dec 2, 2001 Issued
Array ( [id] => 1581168 [patent_doc_number] => 06423619 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-23 [patent_title] => 'Transistor metal gate structure that minimizes non-planarity effects and method of formation' [patent_app_type] => B1 [patent_app_number] => 09/997899 [patent_app_country] => US [patent_app_date] => 2001-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2302 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/423/06423619.pdf [firstpage_image] =>[orig_patent_app_number] => 09997899 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/997899
Transistor metal gate structure that minimizes non-planarity effects and method of formation Nov 29, 2001 Issued
Array ( [id] => 1273945 [patent_doc_number] => 06649496 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-18 [patent_title] => 'Production method for semiconductor crystal' [patent_app_type] => B2 [patent_app_number] => 09/979258 [patent_app_country] => US [patent_app_date] => 2001-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4215 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/649/06649496.pdf [firstpage_image] =>[orig_patent_app_number] => 09979258 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/979258
Production method for semiconductor crystal Nov 20, 2001 Issued
Array ( [id] => 6123578 [patent_doc_number] => 20020074656 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-20 [patent_title] => 'Semiconductor device and a method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 09/988684 [patent_app_country] => US [patent_app_date] => 2001-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 5449 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20020074656.pdf [firstpage_image] =>[orig_patent_app_number] => 09988684 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/988684
Semiconductor device Nov 19, 2001 Issued
Array ( [id] => 1502274 [patent_doc_number] => 06486510 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-11-26 [patent_title] => 'Reduction of reverse short channel effects by implantation of neutral dopants' [patent_app_type] => B2 [patent_app_number] => 10/054297 [patent_app_country] => US [patent_app_date] => 2001-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2141 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/486/06486510.pdf [firstpage_image] =>[orig_patent_app_number] => 10054297 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/054297
Reduction of reverse short channel effects by implantation of neutral dopants Nov 11, 2001 Issued
Array ( [id] => 5859192 [patent_doc_number] => 20020123169 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-05 [patent_title] => 'Methods of forming non-volatile resistance variable devices, and non-volatile resistance variable devices' [patent_app_type] => new [patent_app_number] => 09/999883 [patent_app_country] => US [patent_app_date] => 2001-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3024 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20020123169.pdf [firstpage_image] =>[orig_patent_app_number] => 09999883 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/999883
Method of forming a chalcogenide comprising device Oct 30, 2001 Issued
Array ( [id] => 1299410 [patent_doc_number] => 06623991 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-23 [patent_title] => 'Method of measuring meso-scale structures on wafers' [patent_app_type] => B2 [patent_app_number] => 09/999410 [patent_app_country] => US [patent_app_date] => 2001-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 30 [patent_no_of_words] => 12690 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/623/06623991.pdf [firstpage_image] =>[orig_patent_app_number] => 09999410 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/999410
Method of measuring meso-scale structures on wafers Oct 30, 2001 Issued
Array ( [id] => 6473742 [patent_doc_number] => 20020022279 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-21 [patent_title] => 'Ferroelectric memory device and manufacturing method thereof' [patent_app_type] => new [patent_app_number] => 09/984465 [patent_app_country] => US [patent_app_date] => 2001-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3468 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20020022279.pdf [firstpage_image] =>[orig_patent_app_number] => 09984465 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/984465
Method of manufacturing a ferroelectric memory device Oct 29, 2001 Issued
Array ( [id] => 7645732 [patent_doc_number] => 06472237 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-29 [patent_title] => 'Method and system for determining a thickness of a layer' [patent_app_type] => B1 [patent_app_number] => 10/033066 [patent_app_country] => US [patent_app_date] => 2001-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 3468 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/472/06472237.pdf [firstpage_image] =>[orig_patent_app_number] => 10033066 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/033066
Method and system for determining a thickness of a layer Oct 25, 2001 Issued
Array ( [id] => 1391045 [patent_doc_number] => 06544906 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-04-08 [patent_title] => 'Annealing of high-k dielectric materials' [patent_app_type] => B2 [patent_app_number] => 10/011219 [patent_app_country] => US [patent_app_date] => 2001-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2845 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/544/06544906.pdf [firstpage_image] =>[orig_patent_app_number] => 10011219 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/011219
Annealing of high-k dielectric materials Oct 24, 2001 Issued
Array ( [id] => 6277113 [patent_doc_number] => 20020106853 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-08 [patent_title] => 'Method of reducing oxygen vacancies in a high k capacitor dielectric region, and DRAM processing methods' [patent_app_type] => new [patent_app_number] => 10/055512 [patent_app_country] => US [patent_app_date] => 2001-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3961 [patent_no_of_claims] => 70 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20020106853.pdf [firstpage_image] =>[orig_patent_app_number] => 10055512 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/055512
DRAM processing methods Oct 24, 2001 Issued
Array ( [id] => 6905668 [patent_doc_number] => 20050101063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-12 [patent_title] => 'Three-terminal field-controlled molecular devices' [patent_app_type] => utility [patent_app_number] => 10/399806 [patent_app_country] => US [patent_app_date] => 2001-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 46353 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0101/20050101063.pdf [firstpage_image] =>[orig_patent_app_number] => 10399806 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/399806
Three-terminal field-controlled molecular devices Oct 23, 2001 Abandoned
Array ( [id] => 1056391 [patent_doc_number] => 06855614 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-15 [patent_title] => 'Sidewalls as semiconductor etch stop and diffusion barrier' [patent_app_type] => utility [patent_app_number] => 09/982855 [patent_app_country] => US [patent_app_date] => 2001-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 48 [patent_no_of_words] => 7554 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/855/06855614.pdf [firstpage_image] =>[orig_patent_app_number] => 09982855 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/982855
Sidewalls as semiconductor etch stop and diffusion barrier Oct 21, 2001 Issued
Array ( [id] => 1532276 [patent_doc_number] => 06410345 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-25 [patent_title] => 'Method for manufacturing a ferroelectric memory device' [patent_app_type] => B1 [patent_app_number] => 09/975086 [patent_app_country] => US [patent_app_date] => 2001-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 3490 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/410/06410345.pdf [firstpage_image] =>[orig_patent_app_number] => 09975086 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/975086
Method for manufacturing a ferroelectric memory device Oct 11, 2001 Issued
Array ( [id] => 1306361 [patent_doc_number] => 06617173 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-09 [patent_title] => 'Integration of ferromagnetic films with ultrathin insulating film using atomic layer deposition' [patent_app_type] => B1 [patent_app_number] => 09/974076 [patent_app_country] => US [patent_app_date] => 2001-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5793 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/617/06617173.pdf [firstpage_image] =>[orig_patent_app_number] => 09974076 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/974076
Integration of ferromagnetic films with ultrathin insulating film using atomic layer deposition Oct 9, 2001 Issued
Array ( [id] => 7643890 [patent_doc_number] => 06429148 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-06 [patent_title] => 'Anisotropic formation process of oxide layers for vertical transistors' [patent_app_type] => B1 [patent_app_number] => 09/971735 [patent_app_country] => US [patent_app_date] => 2001-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 1690 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/429/06429148.pdf [firstpage_image] =>[orig_patent_app_number] => 09971735 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/971735
Anisotropic formation process of oxide layers for vertical transistors Oct 8, 2001 Issued
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