Search

Craig Thompson

Examiner (ID: 2411)

Most Active Art Unit
2813
Art Unit(s)
2811, 2812, 2813, 3999
Total Applications
616
Issued Applications
589
Pending Applications
10
Abandoned Applications
17

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4003218 [patent_doc_number] => 06004877 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-21 [patent_title] => 'Method of forming a tungsten layer with N2 plasma treatment' [patent_app_type] => 1 [patent_app_number] => 9/031259 [patent_app_country] => US [patent_app_date] => 1998-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1383 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/004/06004877.pdf [firstpage_image] =>[orig_patent_app_number] => 031259 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/031259
Method of forming a tungsten layer with N2 plasma treatment Feb 25, 1998 Issued
Array ( [id] => 4002453 [patent_doc_number] => 06004825 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-21 [patent_title] => 'Method for making three dimensional ferroelectric memory' [patent_app_type] => 1 [patent_app_number] => 9/027686 [patent_app_country] => US [patent_app_date] => 1998-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5933 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/004/06004825.pdf [firstpage_image] =>[orig_patent_app_number] => 027686 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/027686
Method for making three dimensional ferroelectric memory Feb 22, 1998 Issued
Array ( [id] => 4029661 [patent_doc_number] => 05994198 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Fabrication method for fully landing subminimum features on minimum width lines' [patent_app_type] => 1 [patent_app_number] => 9/027544 [patent_app_country] => US [patent_app_date] => 1998-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 2642 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/994/05994198.pdf [firstpage_image] =>[orig_patent_app_number] => 027544 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/027544
Fabrication method for fully landing subminimum features on minimum width lines Feb 22, 1998 Issued
Array ( [id] => 4029798 [patent_doc_number] => 05994207 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Controlled cleavage process using pressurized fluid' [patent_app_type] => 1 [patent_app_number] => 9/026027 [patent_app_country] => US [patent_app_date] => 1998-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 9480 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/994/05994207.pdf [firstpage_image] =>[orig_patent_app_number] => 026027 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/026027
Controlled cleavage process using pressurized fluid Feb 18, 1998 Issued
Array ( [id] => 4216581 [patent_doc_number] => 06010579 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-04 [patent_title] => 'Reusable substrate for thin film separation' [patent_app_type] => 1 [patent_app_number] => 9/026035 [patent_app_country] => US [patent_app_date] => 1998-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 19 [patent_no_of_words] => 8605 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/010/06010579.pdf [firstpage_image] =>[orig_patent_app_number] => 026035 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/026035
Reusable substrate for thin film separation Feb 18, 1998 Issued
Array ( [id] => 3994070 [patent_doc_number] => 05985742 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-16 [patent_title] => 'Controlled cleavage process and device for patterned films' [patent_app_type] => 1 [patent_app_number] => 9/026015 [patent_app_country] => US [patent_app_date] => 1998-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 9577 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/985/05985742.pdf [firstpage_image] =>[orig_patent_app_number] => 026015 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/026015
Controlled cleavage process and device for patterned films Feb 18, 1998 Issued
Array ( [id] => 4262506 [patent_doc_number] => 06245161 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-12 [patent_title] => 'Economical silicon-on-silicon hybrid wafer assembly' [patent_app_type] => 1 [patent_app_number] => 9/026116 [patent_app_country] => US [patent_app_date] => 1998-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 6091 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/245/06245161.pdf [firstpage_image] =>[orig_patent_app_number] => 026116 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/026116
Economical silicon-on-silicon hybrid wafer assembly Feb 18, 1998 Issued
Array ( [id] => 4234021 [patent_doc_number] => 06074928 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-13 [patent_title] => 'Method of fabricating SOI substrate' [patent_app_type] => 1 [patent_app_number] => 9/023132 [patent_app_country] => US [patent_app_date] => 1998-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 3665 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/074/06074928.pdf [firstpage_image] =>[orig_patent_app_number] => 023132 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/023132
Method of fabricating SOI substrate Feb 11, 1998 Issued
Array ( [id] => 4002896 [patent_doc_number] => 06004856 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-21 [patent_title] => 'Manufacturing process for a raised capacitor electrode' [patent_app_type] => 1 [patent_app_number] => 9/022686 [patent_app_country] => US [patent_app_date] => 1998-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2418 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/004/06004856.pdf [firstpage_image] =>[orig_patent_app_number] => 022686 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/022686
Manufacturing process for a raised capacitor electrode Feb 11, 1998 Issued
Array ( [id] => 4181448 [patent_doc_number] => 06020248 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-01 [patent_title] => 'Method for fabricating semiconductor device having capacitor increased in capacitance by using hemispherical grains without reduction of dopant concentration' [patent_app_type] => 1 [patent_app_number] => 9/020856 [patent_app_country] => US [patent_app_date] => 1998-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 24 [patent_no_of_words] => 5607 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/020/06020248.pdf [firstpage_image] =>[orig_patent_app_number] => 020856 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/020856
Method for fabricating semiconductor device having capacitor increased in capacitance by using hemispherical grains without reduction of dopant concentration Feb 8, 1998 Issued
Array ( [id] => 3936849 [patent_doc_number] => 05981305 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-09 [patent_title] => 'Manufacturing method for electric field emission element using ultra fine particles' [patent_app_type] => 1 [patent_app_number] => 9/017865 [patent_app_country] => US [patent_app_date] => 1998-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 25 [patent_no_of_words] => 6377 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/981/05981305.pdf [firstpage_image] =>[orig_patent_app_number] => 017865 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/017865
Manufacturing method for electric field emission element using ultra fine particles Feb 2, 1998 Issued
Array ( [id] => 4139472 [patent_doc_number] => 06060376 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-09 [patent_title] => 'Integrated etch process for polysilicon/metal gate' [patent_app_type] => 1 [patent_app_number] => 9/005244 [patent_app_country] => US [patent_app_date] => 1998-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2622 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/060/06060376.pdf [firstpage_image] =>[orig_patent_app_number] => 005244 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/005244
Integrated etch process for polysilicon/metal gate Jan 11, 1998 Issued
Array ( [id] => 4124982 [patent_doc_number] => 06127235 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-03 [patent_title] => 'Method for making asymmetrical gate oxide thickness in channel MOSFET region' [patent_app_type] => 1 [patent_app_number] => 9/002656 [patent_app_country] => US [patent_app_date] => 1998-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 4928 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/127/06127235.pdf [firstpage_image] =>[orig_patent_app_number] => 002656 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/002656
Method for making asymmetrical gate oxide thickness in channel MOSFET region Jan 4, 1998 Issued
Array ( [id] => 4145941 [patent_doc_number] => 06063690 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-16 [patent_title] => 'Method for making recessed field oxide for radiation hardened microelectronics' [patent_app_type] => 1 [patent_app_number] => 8/999476 [patent_app_country] => US [patent_app_date] => 1997-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 10 [patent_no_of_words] => 2811 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/063/06063690.pdf [firstpage_image] =>[orig_patent_app_number] => 999476 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/999476
Method for making recessed field oxide for radiation hardened microelectronics Dec 28, 1997 Issued
Array ( [id] => 3926243 [patent_doc_number] => 05877074 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-02 [patent_title] => 'Method for improving the electrical property of gate in polycide structure' [patent_app_type] => 1 [patent_app_number] => 8/998958 [patent_app_country] => US [patent_app_date] => 1997-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 1912 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/877/05877074.pdf [firstpage_image] =>[orig_patent_app_number] => 998958 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/998958
Method for improving the electrical property of gate in polycide structure Dec 28, 1997 Issued
Array ( [id] => 4069521 [patent_doc_number] => 05933716 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-03 [patent_title] => 'Method of making semiconductor device using oblique ion implantation' [patent_app_type] => 1 [patent_app_number] => 8/997644 [patent_app_country] => US [patent_app_date] => 1997-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 16 [patent_no_of_words] => 2419 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/933/05933716.pdf [firstpage_image] =>[orig_patent_app_number] => 997644 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/997644
Method of making semiconductor device using oblique ion implantation Dec 22, 1997 Issued
Array ( [id] => 4293774 [patent_doc_number] => 06184073 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-06 [patent_title] => 'Process for forming a semiconductor device having an interconnect or conductive film electrically insulated from a conductive member or region' [patent_app_type] => 1 [patent_app_number] => 8/997714 [patent_app_country] => US [patent_app_date] => 1997-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8189 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/184/06184073.pdf [firstpage_image] =>[orig_patent_app_number] => 997714 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/997714
Process for forming a semiconductor device having an interconnect or conductive film electrically insulated from a conductive member or region Dec 22, 1997 Issued
Array ( [id] => 4031032 [patent_doc_number] => 05963810 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-05 [patent_title] => 'Semiconductor device having nitrogen enhanced high permittivity gate insulating layer and fabrication thereof' [patent_app_type] => 1 [patent_app_number] => 8/993414 [patent_app_country] => US [patent_app_date] => 1997-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3436 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/963/05963810.pdf [firstpage_image] =>[orig_patent_app_number] => 993414 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/993414
Semiconductor device having nitrogen enhanced high permittivity gate insulating layer and fabrication thereof Dec 17, 1997 Issued
Array ( [id] => 3961335 [patent_doc_number] => 05936301 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'Crack resistant passivation layer' [patent_app_type] => 1 [patent_app_number] => 8/989234 [patent_app_country] => US [patent_app_date] => 1997-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3440 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/936/05936301.pdf [firstpage_image] =>[orig_patent_app_number] => 989234 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/989234
Crack resistant passivation layer Dec 11, 1997 Issued
Array ( [id] => 3896552 [patent_doc_number] => 05897359 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-27 [patent_title] => 'Method of manufacturing a silicon/silicon germanium heterojunction bipolar transistor' [patent_app_type] => 1 [patent_app_number] => 8/987474 [patent_app_country] => US [patent_app_date] => 1997-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2416 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/897/05897359.pdf [firstpage_image] =>[orig_patent_app_number] => 987474 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/987474
Method of manufacturing a silicon/silicon germanium heterojunction bipolar transistor Dec 8, 1997 Issued
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