
Craig Thompson
Examiner (ID: 2411)
| Most Active Art Unit | 2813 |
| Art Unit(s) | 2811, 2812, 2813, 3999 |
| Total Applications | 616 |
| Issued Applications | 589 |
| Pending Applications | 10 |
| Abandoned Applications | 17 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4003218
[patent_doc_number] => 06004877
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-12-21
[patent_title] => 'Method of forming a tungsten layer with N2 plasma treatment'
[patent_app_type] => 1
[patent_app_number] => 9/031259
[patent_app_country] => US
[patent_app_date] => 1998-02-26
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/004/06004877.pdf
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Array
(
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[patent_doc_number] => 06004825
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-12-21
[patent_title] => 'Method for making three dimensional ferroelectric memory'
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[patent_app_number] => 9/027686
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[patent_app_date] => 1998-02-23
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[firstpage_image] =>[orig_patent_app_number] => 027686
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/027686 | Method for making three dimensional ferroelectric memory | Feb 22, 1998 | Issued |
Array
(
[id] => 4029661
[patent_doc_number] => 05994198
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[patent_kind] => NA
[patent_issue_date] => 1999-11-30
[patent_title] => 'Fabrication method for fully landing subminimum features on minimum width lines'
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[patent_app_number] => 9/027544
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[patent_app_date] => 1998-02-23
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Array
(
[id] => 4029798
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[patent_kind] => NA
[patent_issue_date] => 1999-11-30
[patent_title] => 'Controlled cleavage process using pressurized fluid'
[patent_app_type] => 1
[patent_app_number] => 9/026027
[patent_app_country] => US
[patent_app_date] => 1998-02-19
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Array
(
[id] => 4216581
[patent_doc_number] => 06010579
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[patent_issue_date] => 2000-01-04
[patent_title] => 'Reusable substrate for thin film separation'
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Array
(
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[patent_issue_date] => 1999-11-16
[patent_title] => 'Controlled cleavage process and device for patterned films'
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Array
(
[id] => 4262506
[patent_doc_number] => 06245161
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[patent_title] => 'Economical silicon-on-silicon hybrid wafer assembly'
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[firstpage_image] =>[orig_patent_app_number] => 026116
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/026116 | Economical silicon-on-silicon hybrid wafer assembly | Feb 18, 1998 | Issued |
Array
(
[id] => 4234021
[patent_doc_number] => 06074928
[patent_country] => US
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[patent_issue_date] => 2000-06-13
[patent_title] => 'Method of fabricating SOI substrate'
[patent_app_type] => 1
[patent_app_number] => 9/023132
[patent_app_country] => US
[patent_app_date] => 1998-02-12
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[pdf_file] => patents/06/074/06074928.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/023132 | Method of fabricating SOI substrate | Feb 11, 1998 | Issued |
Array
(
[id] => 4002896
[patent_doc_number] => 06004856
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-12-21
[patent_title] => 'Manufacturing process for a raised capacitor electrode'
[patent_app_type] => 1
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[firstpage_image] =>[orig_patent_app_number] => 022686
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/022686 | Manufacturing process for a raised capacitor electrode | Feb 11, 1998 | Issued |
Array
(
[id] => 4181448
[patent_doc_number] => 06020248
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[patent_issue_date] => 2000-02-01
[patent_title] => 'Method for fabricating semiconductor device having capacitor increased in capacitance by using hemispherical grains without reduction of dopant concentration'
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Array
(
[id] => 3936849
[patent_doc_number] => 05981305
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[patent_issue_date] => 1999-11-09
[patent_title] => 'Manufacturing method for electric field emission element using ultra fine particles'
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[patent_app_number] => 9/017865
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/017865 | Manufacturing method for electric field emission element using ultra fine particles | Feb 2, 1998 | Issued |
Array
(
[id] => 4139472
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[patent_title] => 'Integrated etch process for polysilicon/metal gate'
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Array
(
[id] => 4124982
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Array
(
[id] => 4145941
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/999476 | Method for making recessed field oxide for radiation hardened microelectronics | Dec 28, 1997 | Issued |
Array
(
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Array
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Array
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Array
(
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Array
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Array
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