Craig Thompson

Array ( [id] => 6683420 [patent_doc_number] => 20030119284 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-26 [patent_title] => 'Method of manufacturing silicon' [patent_app_type] => new [patent_app_number] => 10/343945 [patent_app_country] => US [patent_app_date] => 2003-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 6280 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20030119284.pdf [firstpage_image] =>[orig_patent_app_number] => 10343945 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6849323 [patent_doc_number] => 20030141525 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-31 [patent_title] => 'Doubly asymmetric double gate transistor and method for forming' [patent_app_type] => new [patent_app_number] => 10/358486 [patent_app_country] => US [patent_app_date] => 2003-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 6314 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20030141525.pdf [firstpage_image] =>[orig_patent_app_number] => 10358486 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1248195 [patent_doc_number] => 06673669 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-01-06 [patent_title] => 'Method of reducing oxygen vacancies and DRAM processing method' [patent_app_type] => B2 [patent_app_number] => 10/358727 [patent_app_country] => US [patent_app_date] => 2003-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4001 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/673/06673669.pdf [firstpage_image] =>[orig_patent_app_number] => 10358727 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7612864 [patent_doc_number] => 06902970 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-07 [patent_title] => 'Integrated circuit including, and fabrication method for producing, bipolar and MOSFET transistors' [patent_app_type] => utility [patent_app_number] => 10/352376 [patent_app_country] => US [patent_app_date] => 2003-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3206 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/902/06902970.pdf [firstpage_image] =>[orig_patent_app_number] => 10352376 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1241182 [patent_doc_number] => 06683005 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-01-27 [patent_title] => 'Method of forming capacitor constructions' [patent_app_type] => B2 [patent_app_number] => 10/347043 [patent_app_country] => US [patent_app_date] => 2003-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3503 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/683/06683005.pdf [firstpage_image] =>[orig_patent_app_number] => 10347043 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6659629 [patent_doc_number] => 20030134439 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-17 [patent_title] => 'Methods of Forming Capacitor Constructions' [patent_app_type] => new [patent_app_number] => 10/347044 [patent_app_country] => US [patent_app_date] => 2003-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3482 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0134/20030134439.pdf [firstpage_image] =>[orig_patent_app_number] => 10347044 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6765740 [patent_doc_number] => 20030100140 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-29 [patent_title] => 'Method for packaging a high efficiency electro-optics device' [patent_app_type] => new [patent_app_number] => 10/342185 [patent_app_country] => US [patent_app_date] => 2003-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2953 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0100/20030100140.pdf [firstpage_image] =>[orig_patent_app_number] => 10342185 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1149703 [patent_doc_number] => 06774395 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-10 [patent_title] => 'Apparatus and methods for characterizing floating body effects in SOI devices' [patent_app_type] => B1 [patent_app_number] => 10/345007 [patent_app_country] => US [patent_app_date] => 2003-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 12382 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/774/06774395.pdf [firstpage_image] =>[orig_patent_app_number] => 10345007 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1080424 [patent_doc_number] => 06835582 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-12-28 [patent_title] => 'Microchip-level optical interconnect' [patent_app_type] => B1 [patent_app_number] => 10/342656 [patent_app_country] => US [patent_app_date] => 2003-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 10 [patent_no_of_words] => 1712 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/835/06835582.pdf [firstpage_image] =>[orig_patent_app_number] => 10342656 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1105043 [patent_doc_number] => 06812155 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-02 [patent_title] => 'Pattern formation method' [patent_app_type] => B2 [patent_app_number] => 10/342796 [patent_app_country] => US [patent_app_date] => 2003-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 5090 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/812/06812155.pdf [firstpage_image] =>[orig_patent_app_number] => 10342796 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1144271 [patent_doc_number] => 06777708 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-17 [patent_title] => 'Apparatus and methods for determining floating body effects in SOI devices' [patent_app_type] => B1 [patent_app_number] => 10/342541 [patent_app_country] => US [patent_app_date] => 2003-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 9208 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/777/06777708.pdf [firstpage_image] =>[orig_patent_app_number] => 10342541 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1188820 [patent_doc_number] => 06734051 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-11 [patent_title] => 'Plasma enhanced chemical vapor deposition methods of forming titanium silicide comprising layers over a plurality of semiconductor substrates' [patent_app_type] => B2 [patent_app_number] => 10/341750 [patent_app_country] => US [patent_app_date] => 2003-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2546 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/734/06734051.pdf [firstpage_image] =>[orig_patent_app_number] => 10341750 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6825326 [patent_doc_number] => 20030235948 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-25 [patent_title] => 'Methods for fabricating semiconductor devices by forming grooves across alternating elongated regions' [patent_app_type] => new [patent_app_number] => 10/340975 [patent_app_country] => US [patent_app_date] => 2003-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5530 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20030235948.pdf [firstpage_image] =>[orig_patent_app_number] => 10340975 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7324343 [patent_doc_number] => 20040137757 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-15 [patent_title] => 'Method and apparatus to improve cracking thresholds and mechanical properties of low-k dielectric material' [patent_app_type] => new [patent_app_number] => 10/342085 [patent_app_country] => US [patent_app_date] => 2003-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4236 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0137/20040137757.pdf [firstpage_image] =>[orig_patent_app_number] => 10342085 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1107518 [patent_doc_number] => 06808945 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-10-26 [patent_title] => 'Method and system for testing tunnel oxide on a memory-related structure' [patent_app_type] => B1 [patent_app_number] => 10/339536 [patent_app_country] => US [patent_app_date] => 2003-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3807 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/808/06808945.pdf [firstpage_image] =>[orig_patent_app_number] => 10339536 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1172691 [patent_doc_number] => 06750126 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-15 [patent_title] => 'Methods for sputter deposition of high-k dielectric films' [patent_app_type] => B1 [patent_app_number] => 10/338276 [patent_app_country] => US [patent_app_date] => 2003-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 6530 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/750/06750126.pdf [firstpage_image] =>[orig_patent_app_number] => 10338276 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1175879 [patent_doc_number] => 06750505 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-15 [patent_title] => 'Non-volatile memory cell with floating gate region autoaligned to the isolation and with a high coupling coefficient' [patent_app_type] => B2 [patent_app_number] => 10/337556 [patent_app_country] => US [patent_app_date] => 2003-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 2079 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/750/06750505.pdf [firstpage_image] =>[orig_patent_app_number] => 10337556 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1248222 [patent_doc_number] => 06673684 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-06 [patent_title] => 'Use of diamond as a hard mask material' [patent_app_type] => B1 [patent_app_number] => 10/335726 [patent_app_country] => US [patent_app_date] => 2003-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4051 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/673/06673684.pdf [firstpage_image] =>[orig_patent_app_number] => 10335726 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1212693 [patent_doc_number] => 06709914 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-23 [patent_title] => 'Manufacturing process of pn junction diode device and pn junction diode device' [patent_app_type] => B2 [patent_app_number] => 10/331646 [patent_app_country] => US [patent_app_date] => 2002-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 5037 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/709/06709914.pdf [firstpage_image] =>[orig_patent_app_number] => 10331646 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1027963 [patent_doc_number] => 06881679 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-19 [patent_title] => 'Etching solution for etching Cu and Cu/Ti metal layer of liquid crystal display device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/331726 [patent_app_country] => US [patent_app_date] => 2002-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 3749 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/881/06881679.pdf [firstpage_image] =>[orig_patent_app_number] => 10331726 [rel_patent_id] =>[rel_patent_doc_number] =>)