Craig Thompson

Array ( [id] => 1162910 [patent_doc_number] => 06759269 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-06 [patent_title] => 'Method for fabricating Al-Si alloy packaging material' [patent_app_type] => B2 [patent_app_number] => 10/285465 [patent_app_country] => US [patent_app_date] => 2002-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 3920 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/759/06759269.pdf [firstpage_image] =>[orig_patent_app_number] => 10285465 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1266583 [patent_doc_number] => 06661097 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-09 [patent_title] => 'Ti liner for copper interconnect with low-k dielectric' [patent_app_type] => B1 [patent_app_number] => 10/287155 [patent_app_country] => US [patent_app_date] => 2002-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1375 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/661/06661097.pdf [firstpage_image] =>[orig_patent_app_number] => 10287155 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6861202 [patent_doc_number] => 20030092210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-15 [patent_title] => 'Method for producing semiconductor light emitting device and semiconductor light emitting device produced by such method' [patent_app_type] => new [patent_app_number] => 10/286055 [patent_app_country] => US [patent_app_date] => 2002-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8232 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0092/20030092210.pdf [firstpage_image] =>[orig_patent_app_number] => 10286055 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7189595 [patent_doc_number] => 20040084711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-06 [patent_title] => 'Nitrogen oxidation to reduce encroachment' [patent_app_type] => new [patent_app_number] => 10/284866 [patent_app_country] => US [patent_app_date] => 2002-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4238 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20040084711.pdf [firstpage_image] =>[orig_patent_app_number] => 10284866 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1015015 [patent_doc_number] => 06894359 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-17 [patent_title] => 'Sensitivity control for nanotube sensors' [patent_app_type] => utility [patent_app_number] => 10/280265 [patent_app_country] => US [patent_app_date] => 2002-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 9566 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/894/06894359.pdf [firstpage_image] =>[orig_patent_app_number] => 10280265 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7631433 [patent_doc_number] => 06635499 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-21 [patent_title] => 'MRAM sense layer isolation' [patent_app_type] => B1 [patent_app_number] => 10/279139 [patent_app_country] => US [patent_app_date] => 2002-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3160 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 12 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/635/06635499.pdf [firstpage_image] =>[orig_patent_app_number] => 10279139 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6686338 [patent_doc_number] => 20030030061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-13 [patent_title] => 'Method for fabricating an organic light emitting diode' [patent_app_type] => new [patent_app_number] => 10/271575 [patent_app_country] => US [patent_app_date] => 2002-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2377 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20030030061.pdf [firstpage_image] =>[orig_patent_app_number] => 10271575 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6820089 [patent_doc_number] => 20030218250 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-27 [patent_title] => 'METHOD FOR HIGH LAYOUT DENSITY INTEGRATED CIRCUIT PACKAGE SUBSTRATE' [patent_app_type] => new [patent_app_number] => 10/265626 [patent_app_country] => US [patent_app_date] => 2002-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3471 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20030218250.pdf [firstpage_image] =>[orig_patent_app_number] => 10265626 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1113044 [patent_doc_number] => RE038613 [patent_country] => US [patent_kind] => E1 [patent_issue_date] => 2004-10-05 [patent_title] => 'Method for growing a nitride compound semiconductor' [patent_app_type] => E1 [patent_app_number] => 10/174289 [patent_app_country] => US [patent_app_date] => 2002-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3524 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/038/RE038613.pdf [firstpage_image] =>[orig_patent_app_number] => 10174289 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1220455 [patent_doc_number] => 06703259 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-09 [patent_title] => 'System and method for achieving planar alignment of a substrate during solder ball mounting for use in semiconductor fabrication' [patent_app_type] => B2 [patent_app_number] => 10/242076 [patent_app_country] => US [patent_app_date] => 2002-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2140 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/703/06703259.pdf [firstpage_image] =>[orig_patent_app_number] => 10242076 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6772406 [patent_doc_number] => 20030015744 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-23 [patent_title] => 'Method of forming memory circuitry' [patent_app_type] => new [patent_app_number] => 10/241243 [patent_app_country] => US [patent_app_date] => 2002-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2671 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20030015744.pdf [firstpage_image] =>[orig_patent_app_number] => 10241243 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7343350 [patent_doc_number] => 20040046238 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-11 [patent_title] => 'Semiconductor chip grid array package design and method of manufacture' [patent_app_type] => new [patent_app_number] => 10/236385 [patent_app_country] => US [patent_app_date] => 2002-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2171 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20040046238.pdf [firstpage_image] =>[orig_patent_app_number] => 10236385 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1239562 [patent_doc_number] => 06686221 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-03 [patent_title] => 'Method for forming packaged semiconductor device having stacked die' [patent_app_type] => B1 [patent_app_number] => 10/231636 [patent_app_country] => US [patent_app_date] => 2002-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 3264 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/686/06686221.pdf [firstpage_image] =>[orig_patent_app_number] => 10231636 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7130226 [patent_doc_number] => 20040041255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-04 [patent_title] => 'MICROELECTRONIC DEVICES WITH IMPROVED HEAT DISSIPATION AND METHODS FOR COOLING MICROELECTRONIC DEVICES' [patent_app_type] => new [patent_app_number] => 10/228906 [patent_app_country] => US [patent_app_date] => 2002-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4086 [patent_no_of_claims] => 74 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0041/20040041255.pdf [firstpage_image] =>[orig_patent_app_number] => 10228906 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1095843 [patent_doc_number] => 06821808 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-23 [patent_title] => 'CMOS APS with stacked avalanche multiplication layer which provides linear and logarithmic photo-conversion characteristics' [patent_app_type] => B2 [patent_app_number] => 10/226326 [patent_app_country] => US [patent_app_date] => 2002-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4668 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/821/06821808.pdf [firstpage_image] =>[orig_patent_app_number] => 10226326 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6750609 [patent_doc_number] => 20030045130 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-06 [patent_title] => 'Methods of treating dielectric materials' [patent_app_type] => new [patent_app_number] => 10/226894 [patent_app_country] => US [patent_app_date] => 2002-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3482 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0045/20030045130.pdf [firstpage_image] =>[orig_patent_app_number] => 10226894 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7375864 [patent_doc_number] => 20040035205 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-26 [patent_title] => 'ELECTRICALLY ISOLATED SUPPORT FOR OVERLYING MEM STRUCTURE' [patent_app_type] => new [patent_app_number] => 10/224207 [patent_app_country] => US [patent_app_date] => 2002-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 8103 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0035/20040035205.pdf [firstpage_image] =>[orig_patent_app_number] => 10224207 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1366369 [patent_doc_number] => 06566152 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-05-20 [patent_title] => 'Method of fabricating Q-switched microlasers' [patent_app_type] => B2 [patent_app_number] => 10/223416 [patent_app_country] => US [patent_app_date] => 2002-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 6800 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/566/06566152.pdf [firstpage_image] =>[orig_patent_app_number] => 10223416 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7625596 [patent_doc_number] => 06723573 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-20 [patent_title] => 'Photonic devices and PICs including sacrificial testing structures and method of making the same' [patent_app_type] => B2 [patent_app_number] => 10/222177 [patent_app_country] => US [patent_app_date] => 2002-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3066 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 9 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/723/06723573.pdf [firstpage_image] =>[orig_patent_app_number] => 10222177 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1202744 [patent_doc_number] => 06720272 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-13 [patent_title] => 'Methods of forming capacitor constructions' [patent_app_type] => B2 [patent_app_number] => 10/222330 [patent_app_country] => US [patent_app_date] => 2002-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3481 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/720/06720272.pdf [firstpage_image] =>[orig_patent_app_number] => 10222330 [rel_patent_id] =>[rel_patent_doc_number] =>)