Craig Thompson

Array ( [id] => 1080461 [patent_doc_number] => 06835619 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-28 [patent_title] => 'Method of forming a memory transistor comprising a Schottky contact' [patent_app_type] => B2 [patent_app_number] => 10/215898 [patent_app_country] => US [patent_app_date] => 2002-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2382 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/835/06835619.pdf [firstpage_image] =>[orig_patent_app_number] => 10215898 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6755862 [patent_doc_number] => 20030003639 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-02 [patent_title] => 'Method of manufacturing a semiconductor integrated circuit device' [patent_app_type] => new [patent_app_number] => 10/211262 [patent_app_country] => US [patent_app_date] => 2002-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 17691 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20030003639.pdf [firstpage_image] =>[orig_patent_app_number] => 10211262 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1086510 [patent_doc_number] => 06831342 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-14 [patent_title] => 'Optical device for converting incident light into a second harmonic' [patent_app_type] => B2 [patent_app_number] => 10/211566 [patent_app_country] => US [patent_app_date] => 2002-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2868 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/831/06831342.pdf [firstpage_image] =>[orig_patent_app_number] => 10211566 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6713783 [patent_doc_number] => 20030025131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-06 [patent_title] => 'Formation of planar strained layers' [patent_app_type] => new [patent_app_number] => 10/211126 [patent_app_country] => US [patent_app_date] => 2002-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3922 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20030025131.pdf [firstpage_image] =>[orig_patent_app_number] => 10211126 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7400696 [patent_doc_number] => 20040023485 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-05 [patent_title] => 'Method for preventing cracking and improving barrier layer adhesion in multi- layered low-k semiconductor devices' [patent_app_type] => new [patent_app_number] => 10/208327 [patent_app_country] => US [patent_app_date] => 2002-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4925 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20040023485.pdf [firstpage_image] =>[orig_patent_app_number] => 10208327 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1339860 [patent_doc_number] => 06589845 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-08 [patent_title] => 'Method of forming a semiconductor device and structure therefor' [patent_app_type] => B1 [patent_app_number] => 10/195166 [patent_app_country] => US [patent_app_date] => 2002-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4411 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/589/06589845.pdf [firstpage_image] =>[orig_patent_app_number] => 10195166 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7445830 [patent_doc_number] => 20040009616 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-15 [patent_title] => 'Method to detect systematic defects in VLSI manufacturing' [patent_app_type] => new [patent_app_number] => 10/191212 [patent_app_country] => US [patent_app_date] => 2002-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4924 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20040009616.pdf [firstpage_image] =>[orig_patent_app_number] => 10191212 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1273804 [patent_doc_number] => 06649467 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-18 [patent_title] => 'Method of making high density semiconductor memory' [patent_app_type] => B2 [patent_app_number] => 10/191630 [patent_app_country] => US [patent_app_date] => 2002-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 26 [patent_no_of_words] => 4335 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/649/06649467.pdf [firstpage_image] =>[orig_patent_app_number] => 10191630 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1062748 [patent_doc_number] => 06849492 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-01 [patent_title] => 'Method for forming standard voltage threshold and low voltage threshold MOSFET devices' [patent_app_type] => utility [patent_app_number] => 10/191337 [patent_app_country] => US [patent_app_date] => 2002-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 17 [patent_no_of_words] => 5396 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/849/06849492.pdf [firstpage_image] =>[orig_patent_app_number] => 10191337 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6651095 [patent_doc_number] => 20030008424 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-09 [patent_title] => 'Multichip module and method for testing connection of the module' [patent_app_type] => new [patent_app_number] => 10/189549 [patent_app_country] => US [patent_app_date] => 2002-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 12169 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20030008424.pdf [firstpage_image] =>[orig_patent_app_number] => 10189549 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6787829 [patent_doc_number] => 20030139068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-24 [patent_title] => 'Method of Illumination with linearly polarized laser radiation' [patent_app_type] => new [patent_app_number] => 10/189527 [patent_app_country] => US [patent_app_date] => 2002-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2625 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0139/20030139068.pdf [firstpage_image] =>[orig_patent_app_number] => 10189527 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1012655 [patent_doc_number] => 06897126 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-24 [patent_title] => 'Semiconductor device manufacturing method using mask slanting from orientation flat' [patent_app_type] => utility [patent_app_number] => 10/189775 [patent_app_country] => US [patent_app_date] => 2002-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1862 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/897/06897126.pdf [firstpage_image] =>[orig_patent_app_number] => 10189775 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1066244 [patent_doc_number] => 06847085 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-25 [patent_title] => 'High aspect ratio contact surfaces having reduced contaminants' [patent_app_type] => utility [patent_app_number] => 10/188147 [patent_app_country] => US [patent_app_date] => 2002-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 4238 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/847/06847085.pdf [firstpage_image] =>[orig_patent_app_number] => 10188147 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6745313 [patent_doc_number] => 20030022496 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-30 [patent_title] => 'Stencil mask and method of producing the same, semiconductor device produced using the stencil mask and method of producing the semiconductor device' [patent_app_type] => new [patent_app_number] => 10/184903 [patent_app_country] => US [patent_app_date] => 2002-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4695 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20030022496.pdf [firstpage_image] =>[orig_patent_app_number] => 10184903 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1005301 [patent_doc_number] => 06905895 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-06-14 [patent_title] => 'Predicting process excursions based upon tool state variables' [patent_app_type] => utility [patent_app_number] => 10/185495 [patent_app_country] => US [patent_app_date] => 2002-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5656 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/905/06905895.pdf [firstpage_image] =>[orig_patent_app_number] => 10185495 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6753479 [patent_doc_number] => 20030001255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-02 [patent_title] => 'Hybrid integrated circuit device and manufacturing method thereof' [patent_app_type] => new [patent_app_number] => 10/183736 [patent_app_country] => US [patent_app_date] => 2002-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6782 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20030001255.pdf [firstpage_image] =>[orig_patent_app_number] => 10183736 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1212785 [patent_doc_number] => 06709962 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-23 [patent_title] => 'Process for manufacturing printed circuit boards' [patent_app_type] => B2 [patent_app_number] => 10/183574 [patent_app_country] => US [patent_app_date] => 2002-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 12433 [patent_no_of_claims] => 64 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/709/06709962.pdf [firstpage_image] =>[orig_patent_app_number] => 10183574 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6676880 [patent_doc_number] => 20030227020 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-11 [patent_title] => 'Light emitting apparatus with current regulation function' [patent_app_type] => new [patent_app_number] => 10/166997 [patent_app_country] => US [patent_app_date] => 2002-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1765 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20030227020.pdf [firstpage_image] =>[orig_patent_app_number] => 10166997 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1288815 [patent_doc_number] => 06632729 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-14 [patent_title] => 'Laser thermal annealing of high-k gate oxide layers' [patent_app_type] => B1 [patent_app_number] => 10/163455 [patent_app_country] => US [patent_app_date] => 2002-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 5027 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/632/06632729.pdf [firstpage_image] =>[orig_patent_app_number] => 10163455 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6678598 [patent_doc_number] => 20030228739 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-11 [patent_title] => 'Wafer cutting using laser marking' [patent_app_type] => new [patent_app_number] => 10/164047 [patent_app_country] => US [patent_app_date] => 2002-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4159 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0228/20030228739.pdf [firstpage_image] =>[orig_patent_app_number] => 10164047 [rel_patent_id] =>[rel_patent_doc_number] =>)