
Cuong Quang Nguyen
Examiner (ID: 19311, Phone: (571)272-1661 , Office: P/2811 )
| Most Active Art Unit | 2811 |
| Art Unit(s) | 2811 |
| Total Applications | 2016 |
| Issued Applications | 1819 |
| Pending Applications | 13 |
| Abandoned Applications | 194 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 10710008
[patent_doc_number] => 20160056155
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-02-25
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/833983
[patent_app_country] => US
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14833983
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Array
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[patent_issue_date] => 2016-06-07
[patent_title] => 'Integrated circuit assembly with cushion polymer layer'
[patent_app_type] => utility
[patent_app_number] => 14/828986
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/828986 | Integrated circuit assembly with cushion polymer layer | Aug 17, 2015 | Issued |
Array
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[patent_title] => 'Method for fabrication of an integrated circuit rendering a reverse engineering of the integrated circuit more difficult and corresponding integrated circuit'
[patent_app_type] => utility
[patent_app_number] => 14/829292
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[patent_app_date] => 2015-08-18
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/829292 | Method for fabrication of an integrated circuit rendering a reverse engineering of the integrated circuit more difficult and corresponding integrated circuit | Aug 17, 2015 | Issued |
Array
(
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[patent_doc_number] => 09252215
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[patent_issue_date] => 2016-02-02
[patent_title] => 'Constrained epitaxial source/drain regions on semiconductor-on-insulator finFET device'
[patent_app_type] => utility
[patent_app_number] => 14/827535
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/827535 | Constrained epitaxial source/drain regions on semiconductor-on-insulator finFET device | Aug 16, 2015 | Issued |
Array
(
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[patent_doc_number] => 20150349053
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[patent_kind] => A1
[patent_issue_date] => 2015-12-03
[patent_title] => 'SEMICONDUCTOR DEVICES WITH A LAYER OF MATERIAL HAVING A PLURALITY OF SOURCE/DRAIN TRENCHES'
[patent_app_type] => utility
[patent_app_number] => 14/823226
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/823226 | SEMICONDUCTOR DEVICES WITH A LAYER OF MATERIAL HAVING A PLURALITY OF SOURCE/DRAIN TRENCHES | Aug 10, 2015 | Abandoned |
Array
(
[id] => 12047369
[patent_doc_number] => 09824978
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-11-21
[patent_title] => 'Connection patterns for high-density device packaging'
[patent_app_type] => utility
[patent_app_number] => 14/820195
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/820195 | Connection patterns for high-density device packaging | Aug 5, 2015 | Issued |
Array
(
[id] => 10624624
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[patent_issue_date] => 2016-05-17
[patent_title] => 'FinFET and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 14/819602
[patent_app_country] => US
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14819602
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/819602 | FinFET and method of manufacturing the same | Aug 5, 2015 | Issued |
Array
(
[id] => 10455564
[patent_doc_number] => 20150340579
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-11-26
[patent_title] => 'WAFER-LEVEL LIGHT EMITTING DIODE PACKAGE AND METHOD OF FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/815433
[patent_app_country] => US
[patent_app_date] => 2015-07-31
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/815433 | Wafer-level light emitting diode package and method of fabricating the same | Jul 30, 2015 | Issued |
Array
(
[id] => 10486663
[patent_doc_number] => 20150371683
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-24
[patent_title] => 'STACKED-DIE MULTI-PROCESSOR'
[patent_app_type] => utility
[patent_app_number] => 14/810905
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/810905 | Stacked-die multi-processor | Jul 27, 2015 | Issued |
Array
(
[id] => 10448143
[patent_doc_number] => 20150333157
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-11-19
[patent_title] => 'GRAPHENE NANORIBBONS AND CARBON NANOTUBES FABRICATED FROM SiC FINS OR NANOWIRE TEMPLATES'
[patent_app_type] => utility
[patent_app_number] => 14/810017
[patent_app_country] => US
[patent_app_date] => 2015-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14810017
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/810017 | Graphene nanoribbons and carbon nanotubes fabricated from SiC fins or nanowire templates | Jul 26, 2015 | Issued |
Array
(
[id] => 11425132
[patent_doc_number] => 20170033278
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-02-02
[patent_title] => 'Data Reader with Front Shield Coupling Structure'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/810164 | Data reader with front shield coupling structure | Jul 26, 2015 | Issued |
Array
(
[id] => 11753521
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[patent_issue_date] => 2017-07-18
[patent_title] => 'Array substrate and method of fabricating the same, and display device'
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Array
(
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/799308 | Porous Quantum Dot Carriers | Jul 13, 2015 | Abandoned |
Array
(
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Array
(
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Array
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Array
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