Search

Cynthia H. Britt

Examiner (ID: 10505, Phone: (571)272-3815 , Office: P/2117 )

Most Active Art Unit
2117
Art Unit(s)
2117, 2133, 2138, 2111
Total Applications
1872
Issued Applications
1708
Pending Applications
85
Abandoned Applications
106

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18872428 [patent_doc_number] => 11860224 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Interposer instrumentation method and apparatus [patent_app_type] => utility [patent_app_number] => 17/739025 [patent_app_country] => US [patent_app_date] => 2022-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 50 [patent_no_of_words] => 11432 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17739025 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/739025
Interposer instrumentation method and apparatus May 5, 2022 Issued
Array ( [id] => 17794273 [patent_doc_number] => 20220253365 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-11 [patent_title] => ON-DIE LOGIC ANALYZER [patent_app_type] => utility [patent_app_number] => 17/729841 [patent_app_country] => US [patent_app_date] => 2022-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6738 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17729841 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/729841
On-die logic analyzer Apr 25, 2022 Issued
Array ( [id] => 18702571 [patent_doc_number] => 11789078 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-17 [patent_title] => Electronic device comprising a memory accessible via a JTAG interface, and corresponding method of accessing a memory [patent_app_type] => utility [patent_app_number] => 17/714515 [patent_app_country] => US [patent_app_date] => 2022-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 4566 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17714515 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/714515
Electronic device comprising a memory accessible via a JTAG interface, and corresponding method of accessing a memory Apr 5, 2022 Issued
Array ( [id] => 17722221 [patent_doc_number] => 20220214943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-07 [patent_title] => METHOD OF CORRECTING ERRORS IN A MEMORY ARRAY AND METHOD OF SCREENING WEAK BITS IN THE SAME [patent_app_type] => utility [patent_app_number] => 17/703857 [patent_app_country] => US [patent_app_date] => 2022-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17210 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17703857 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/703857
Method of correcting errors in a memory array and method of screening weak bits in the same Mar 23, 2022 Issued
Array ( [id] => 18521200 [patent_doc_number] => 11711099 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-07-25 [patent_title] => Low gate-count encoding algorithm and hardware of flexible rate GLDPC ECC [patent_app_type] => utility [patent_app_number] => 17/702048 [patent_app_country] => US [patent_app_date] => 2022-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 30 [patent_no_of_words] => 8855 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17702048 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/702048
Low gate-count encoding algorithm and hardware of flexible rate GLDPC ECC Mar 22, 2022 Issued
Array ( [id] => 18650838 [patent_doc_number] => 20230296673 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => DDR5 SDRAM DIMM SLOT DETECTION SYSTEM AND METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/701429 [patent_app_country] => US [patent_app_date] => 2022-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4415 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 397 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17701429 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/701429
DDR5 SDRAM DIMM slot detection system and method thereof Mar 21, 2022 Issued
Array ( [id] => 18527141 [patent_doc_number] => 11714131 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-08-01 [patent_title] => Circuit and method for scan testing [patent_app_type] => utility [patent_app_number] => 17/699900 [patent_app_country] => US [patent_app_date] => 2022-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 11474 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17699900 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/699900
Circuit and method for scan testing Mar 20, 2022 Issued
Array ( [id] => 17693932 [patent_doc_number] => 20220201225 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => SOFT FEC WITH PARITY CHECK [patent_app_type] => utility [patent_app_number] => 17/693931 [patent_app_country] => US [patent_app_date] => 2022-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6899 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17693931 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/693931
Soft FEC with parity check Mar 13, 2022 Issued
Array ( [id] => 17689443 [patent_doc_number] => 20220196736 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => AT-SPEED TEST ACCESS PORT OPERATIONS [patent_app_type] => utility [patent_app_number] => 17/692057 [patent_app_country] => US [patent_app_date] => 2022-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13112 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17692057 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/692057
At-speed test access port operations Mar 9, 2022 Issued
Array ( [id] => 18629594 [patent_doc_number] => 20230288479 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => APPARATUS AND METHOD FOR REUSING MANUFACTURING CONTENT ACROSS MULTI-CHIP PACKAGES [patent_app_type] => utility [patent_app_number] => 17/691160 [patent_app_country] => US [patent_app_date] => 2022-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7046 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17691160 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/691160
Apparatus and method for reusing manufacturing content across multi-chip packages Mar 9, 2022 Issued
Array ( [id] => 18548880 [patent_doc_number] => 11722243 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-08 [patent_title] => Signalling coding and modulation method and demodulation and decoding method and device [patent_app_type] => utility [patent_app_number] => 17/652927 [patent_app_country] => US [patent_app_date] => 2022-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 9007 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17652927 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/652927
Signalling coding and modulation method and demodulation and decoding method and device Feb 27, 2022 Issued
Array ( [id] => 19576126 [patent_doc_number] => 20240380418 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => TRANSMISSION DEVICE, TRANSMISSION METHOD, RECEPTION DEVICE, AND RECEPTION METHOD [patent_app_type] => utility [patent_app_number] => 18/576756 [patent_app_country] => US [patent_app_date] => 2022-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 62963 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 1198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18576756 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/576756
TRANSMISSION DEVICE, TRANSMISSION METHOD, RECEPTION DEVICE, AND RECEPTION METHOD Feb 23, 2022 Abandoned
Array ( [id] => 17659267 [patent_doc_number] => 20220179732 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-09 [patent_title] => STRETCH FACTOR ERROR MITIGATION ENABLED QUANTUM COMPUTERS [patent_app_type] => utility [patent_app_number] => 17/652000 [patent_app_country] => US [patent_app_date] => 2022-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18555 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17652000 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/652000
Stretch factor error mitigation enabled quantum computers Feb 21, 2022 Issued
Array ( [id] => 17646094 [patent_doc_number] => 20220173833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-02 [patent_title] => SOFT FEC WITH PARITY CHECK [patent_app_type] => utility [patent_app_number] => 17/677481 [patent_app_country] => US [patent_app_date] => 2022-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7594 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17677481 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/677481
Soft FEC with parity check Feb 21, 2022 Issued
Array ( [id] => 17643950 [patent_doc_number] => 20220171688 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-02 [patent_title] => SCAN SYNCHRONOUS-WRITE-THROUGH TESTING ARCHITECTURES FOR A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/651595 [patent_app_country] => US [patent_app_date] => 2022-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9730 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17651595 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/651595
Scan synchronous-write-through testing architectures for a memory device Feb 17, 2022 Issued
Array ( [id] => 17751883 [patent_doc_number] => 20220230088 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-21 [patent_title] => METHOD AND APPARATUS FOR CROSSTALK ANALYSIS OF QUBITS, COMPUTER DEVICE, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/674793 [patent_app_country] => US [patent_app_date] => 2022-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13851 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17674793 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/674793
Method and apparatus for crosstalk analysis of qubits, computer device, and storage medium Feb 16, 2022 Issued
Array ( [id] => 18372393 [patent_doc_number] => 11652579 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-16 [patent_title] => Apparatus and method for improved uplink joint reception coordinated multi-point (CoMP) using a fake HARQ process [patent_app_type] => utility [patent_app_number] => 17/667936 [patent_app_country] => US [patent_app_date] => 2022-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8941 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 406 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17667936 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/667936
Apparatus and method for improved uplink joint reception coordinated multi-point (CoMP) using a fake HARQ process Feb 8, 2022 Issued
Array ( [id] => 19238330 [patent_doc_number] => 20240195525 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => COMMUNICATION DEVICE, COMMUNICATION METHOD, AND COMMUNICATION SYSTEM [patent_app_type] => utility [patent_app_number] => 18/551408 [patent_app_country] => US [patent_app_date] => 2022-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23210 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18551408 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/551408
Communication device, communication method, and communication system Feb 1, 2022 Issued
Array ( [id] => 18445420 [patent_doc_number] => 11680983 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-06-20 [patent_title] => Integrated circuit having an in-situ circuit for detecting an impending circuit failure [patent_app_type] => utility [patent_app_number] => 17/649623 [patent_app_country] => US [patent_app_date] => 2022-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7894 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17649623 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/649623
Integrated circuit having an in-situ circuit for detecting an impending circuit failure Jan 31, 2022 Issued
Array ( [id] => 18532291 [patent_doc_number] => 20230237364 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-27 [patent_title] => CLASSIFYING QUANTUM ERRORS [patent_app_type] => utility [patent_app_number] => 17/585922 [patent_app_country] => US [patent_app_date] => 2022-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5737 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17585922 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/585922
Classifying quantum errors Jan 26, 2022 Issued
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