
Cynthia H. Britt
Examiner (ID: 11869)
| Most Active Art Unit | 2117 |
| Art Unit(s) | 2117, 2111, 2133, 2138 |
| Total Applications | 1844 |
| Issued Applications | 1687 |
| Pending Applications | 80 |
| Abandoned Applications | 105 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 14138989
[patent_doc_number] => 20190103884
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-04-04
[patent_title] => SEMICONDUCTOR DEVICE INCLUDING ERROR CORRECTION CODE UNIT, AND METHODS OF OPERATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 15/975601
[patent_app_country] => US
[patent_app_date] => 2018-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13404
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15975601
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/975601 | Semiconductor device including error correction code unit that generates data block matrix including plural parity blocks and plural data block groups diagonally arranged, and methods of operating the same | May 8, 2018 | Issued |
Array
(
[id] => 13544527
[patent_doc_number] => 20180323810
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-11-08
[patent_title] => EARLY-TERMINATION TECHNIQUES FOR POLAR LIST DECODERS
[patent_app_type] => utility
[patent_app_number] => 15/969724
[patent_app_country] => US
[patent_app_date] => 2018-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15764
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -42
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15969724
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/969724 | Early-termination techniques for polar list decoders | May 1, 2018 | Issued |
Array
(
[id] => 13544511
[patent_doc_number] => 20180323802
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-11-08
[patent_title] => Multi-Label Offset Lifting Method
[patent_app_type] => utility
[patent_app_number] => 15/968597
[patent_app_country] => US
[patent_app_date] => 2018-05-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9927
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15968597
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/968597 | Multi-label offset lifting method | Apr 30, 2018 | Issued |
Array
(
[id] => 14201487
[patent_doc_number] => 10267852
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-04-23
[patent_title] => Inputting TDI addresses when TDI high, moving update-DR to RT/I
[patent_app_type] => utility
[patent_app_number] => 15/968264
[patent_app_country] => US
[patent_app_date] => 2018-05-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 43
[patent_no_of_words] => 10132
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15968264
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/968264 | Inputting TDI addresses when TDI high, moving update-DR to RT/I | Apr 30, 2018 | Issued |
Array
(
[id] => 14399305
[patent_doc_number] => 10312948
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-06-04
[patent_title] => Method and system for retransmitting data using systematic polar coding
[patent_app_type] => utility
[patent_app_number] => 15/967138
[patent_app_country] => US
[patent_app_date] => 2018-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 19343
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 284
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15967138
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/967138 | Method and system for retransmitting data using systematic polar coding | Apr 29, 2018 | Issued |
Array
(
[id] => 13394049
[patent_doc_number] => 20180248567
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-08-30
[patent_title] => METHOD FOR ERROR-CORRECTION CODING
[patent_app_type] => utility
[patent_app_number] => 15/965855
[patent_app_country] => US
[patent_app_date] => 2018-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9330
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15965855
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/965855 | METHOD FOR ERROR-CORRECTION CODING | Apr 27, 2018 | Abandoned |
Array
(
[id] => 16046081
[patent_doc_number] => 10684913
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-06-16
[patent_title] => Systems and methods for detecting errors and/or restoring non-volatile random access memory using error correction code
[patent_app_type] => utility
[patent_app_number] => 15/962665
[patent_app_country] => US
[patent_app_date] => 2018-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 7189
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15962665
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/962665 | Systems and methods for detecting errors and/or restoring non-volatile random access memory using error correction code | Apr 24, 2018 | Issued |
Array
(
[id] => 13345927
[patent_doc_number] => 20180224503
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-08-09
[patent_title] => TEST COMPRESSION IN A JTAG DAISY-CHAIN ENVIRONMENT
[patent_app_type] => utility
[patent_app_number] => 15/945414
[patent_app_country] => US
[patent_app_date] => 2018-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14350
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 305
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15945414
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/945414 | Test compression in a JTAG daisy-chain environment | Apr 3, 2018 | Issued |
Array
(
[id] => 14218623
[patent_doc_number] => 20190121696
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-04-25
[patent_title] => SYSTEMS AND METHODS FOR FAST ACCESS OF NON-VOLATILE STORAGE DEVICES
[patent_app_type] => utility
[patent_app_number] => 15/943323
[patent_app_country] => US
[patent_app_date] => 2018-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7828
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15943323
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/943323 | Systems and methods for fast access of non-volatile storage devices | Apr 1, 2018 | Issued |
Array
(
[id] => 14233581
[patent_doc_number] => 20190128963
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-02
[patent_title] => BROADCAST SCAN NETWORK
[patent_app_type] => utility
[patent_app_number] => 15/935438
[patent_app_country] => US
[patent_app_date] => 2018-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4830
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15935438
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/935438 | Broadcast scan network | Mar 25, 2018 | Issued |
Array
(
[id] => 14076751
[patent_doc_number] => 20190087263
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-03-21
[patent_title] => MEMORY DEVICE FOR PERFORMING PARALLEL READ-MODIFY-WRITE OPERATION
[patent_app_type] => utility
[patent_app_number] => 15/925111
[patent_app_country] => US
[patent_app_date] => 2018-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8933
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15925111
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/925111 | Memory device for performing parallel read-modify-write operation | Mar 18, 2018 | Issued |
Array
(
[id] => 16774748
[patent_doc_number] => 10985876
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-04-20
[patent_title] => Determination of new radio (NR) physical uplink control channel (PUCCH) resource for hybrid automatic repeat request acknowledgement (HARQ-ACK) feedback
[patent_app_type] => utility
[patent_app_number] => 16/482758
[patent_app_country] => US
[patent_app_date] => 2018-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 16
[patent_no_of_words] => 23679
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16482758
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/482758 | Determination of new radio (NR) physical uplink control channel (PUCCH) resource for hybrid automatic repeat request acknowledgement (HARQ-ACK) feedback | Mar 12, 2018 | Issued |
Array
(
[id] => 15730997
[patent_doc_number] => 10613927
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2020-04-07
[patent_title] => System and method for improved memory error rate estimation
[patent_app_type] => utility
[patent_app_number] => 15/917350
[patent_app_country] => US
[patent_app_date] => 2018-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4796
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15917350
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/917350 | System and method for improved memory error rate estimation | Mar 8, 2018 | Issued |
Array
(
[id] => 13961295
[patent_doc_number] => 20190056992
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-02-21
[patent_title] => DATA STORAGE DEVICE AND OPERATING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 15/908973
[patent_app_country] => US
[patent_app_date] => 2018-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7827
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15908973
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/908973 | Data storage device for performing decoding operation and operating method thereof | Feb 28, 2018 | Issued |
Array
(
[id] => 13495933
[patent_doc_number] => 20180299509
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-10-18
[patent_title] => SELF-TEST OF AN ASYNCHRONOUS CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 15/903980
[patent_app_country] => US
[patent_app_date] => 2018-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4847
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15903980
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/903980 | Self-test of an asynchronous circuit | Feb 22, 2018 | Issued |
Array
(
[id] => 12866503
[patent_doc_number] => 20180180676
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-06-28
[patent_title] => PROGRAMMABLE TEST COMPRESSION ARCHITECTURE INPUT/OUTPUT SHIFT REGISTER COUPLED TO SCI/SCO/PCO
[patent_app_type] => utility
[patent_app_number] => 15/901398
[patent_app_country] => US
[patent_app_date] => 2018-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13690
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15901398
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/901398 | Tap, decoder providing SC and SE to scan path circuits | Feb 20, 2018 | Issued |
Array
(
[id] => 12842770
[patent_doc_number] => 20180172763
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-06-21
[patent_title] => REDUCED SIGNALING INTERFACE METHOD & APPARATUS
[patent_app_type] => utility
[patent_app_number] => 15/899118
[patent_app_country] => US
[patent_app_date] => 2018-02-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16271
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -5
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15899118
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/899118 | Address/instruction registers, target domain interfaces, control information controlling all domains | Feb 18, 2018 | Issued |
Array
(
[id] => 14007937
[patent_doc_number] => 10222421
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-03-05
[patent_title] => Method for detecting faults on retention cell pins
[patent_app_type] => utility
[patent_app_number] => 15/896678
[patent_app_country] => US
[patent_app_date] => 2018-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 8713
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 211
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15896678
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/896678 | Method for detecting faults on retention cell pins | Feb 13, 2018 | Issued |
Array
(
[id] => 13972919
[patent_doc_number] => 10215807
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-02-26
[patent_title] => Decompressed/compressed data parallel scan paths with input/output shift register, SCI/SCO
[patent_app_type] => utility
[patent_app_number] => 15/892664
[patent_app_country] => US
[patent_app_date] => 2018-02-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 45
[patent_no_of_words] => 13680
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 258
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15892664
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/892664 | Decompressed/compressed data parallel scan paths with input/output shift register, SCI/SCO | Feb 8, 2018 | Issued |
Array
(
[id] => 14553855
[patent_doc_number] => 10345380
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-07-09
[patent_title] => Implementing over-masking removal in an on product multiple input signature register (OPMISR) test due to common channel mask scan registers (CMSR) loading
[patent_app_type] => utility
[patent_app_number] => 15/886993
[patent_app_country] => US
[patent_app_date] => 2018-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 18
[patent_no_of_words] => 5177
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15886993
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/886993 | Implementing over-masking removal in an on product multiple input signature register (OPMISR) test due to common channel mask scan registers (CMSR) loading | Feb 1, 2018 | Issued |