Search

Cynthia H. Britt

Examiner (ID: 11869)

Most Active Art Unit
2117
Art Unit(s)
2117, 2111, 2133, 2138
Total Applications
1844
Issued Applications
1687
Pending Applications
80
Abandoned Applications
105

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9563893 [patent_doc_number] => 20140181606 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'DIRECT SCAN ACCESS JTAG' [patent_app_type] => utility [patent_app_number] => 14/189444 [patent_app_country] => US [patent_app_date] => 2014-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 13902 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14189444 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/189444
JTAG multiplexer with clock/mode input, mode/clock input and mode output Feb 24, 2014 Issued
Array ( [id] => 11180477 [patent_doc_number] => 09412471 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-09 [patent_title] => 'Method of reading data from a nonvolatile memory device, nonvolatile memory device, and method of operating a memory system' [patent_app_type] => utility [patent_app_number] => 14/186504 [patent_app_country] => US [patent_app_date] => 2014-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 40 [patent_no_of_words] => 22341 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14186504 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/186504
Method of reading data from a nonvolatile memory device, nonvolatile memory device, and method of operating a memory system Feb 20, 2014 Issued
Array ( [id] => 10944047 [patent_doc_number] => 20140347068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-27 [patent_title] => 'SIGNAL INTEGRITY TEST SYSTEM AND METHOD' [patent_app_type] => utility [patent_app_number] => 14/185167 [patent_app_country] => US [patent_app_date] => 2014-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 905 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14185167 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/185167
SIGNAL INTEGRITY TEST SYSTEM AND METHOD Feb 19, 2014 Abandoned
Array ( [id] => 10557761 [patent_doc_number] => 09281970 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-08 [patent_title] => 'Error burst detection for assessing reliability of a communication link' [patent_app_type] => utility [patent_app_number] => 14/180761 [patent_app_country] => US [patent_app_date] => 2014-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 8756 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14180761 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/180761
Error burst detection for assessing reliability of a communication link Feb 13, 2014 Issued
Array ( [id] => 9540191 [patent_doc_number] => 20140164838 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-12 [patent_title] => 'AT-SPEED TEST ACCESS PORT OPERATIONS' [patent_app_type] => utility [patent_app_number] => 14/179754 [patent_app_country] => US [patent_app_date] => 2014-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 13111 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14179754 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/179754
At speed TAP, dual port router, and command flip-flop circuitry Feb 12, 2014 Issued
Array ( [id] => 9520080 [patent_doc_number] => 20140156572 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-05 [patent_title] => 'AUTOMATIC IDENTIFICATION OF INFORMATION USEFUL FOR GENERATION-BASED FUNCTIONAL VERIFICATION' [patent_app_type] => utility [patent_app_number] => 14/172922 [patent_app_country] => US [patent_app_date] => 2014-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6975 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14172922 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/172922
Automatic identification of information useful for generation-based functional verification Feb 4, 2014 Issued
Array ( [id] => 10098065 [patent_doc_number] => 09134372 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-15 [patent_title] => 'IC linking module gating inputs of TAP select and enable' [patent_app_type] => utility [patent_app_number] => 14/173473 [patent_app_country] => US [patent_app_date] => 2014-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 7561 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 303 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14173473 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/173473
IC linking module gating inputs of TAP select and enable Feb 4, 2014 Issued
Array ( [id] => 10327873 [patent_doc_number] => 20150212878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-30 [patent_title] => 'NON-BLOCKING COMMANDS' [patent_app_type] => utility [patent_app_number] => 14/168697 [patent_app_country] => US [patent_app_date] => 2014-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7197 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14168697 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/168697
Non-blocking commands Jan 29, 2014 Issued
Array ( [id] => 9604913 [patent_doc_number] => 20140201595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-17 [patent_title] => 'RESOLVING TRAPPING SETS' [patent_app_type] => utility [patent_app_number] => 14/160175 [patent_app_country] => US [patent_app_date] => 2014-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 9369 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14160175 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/160175
Resolving trapping sets Jan 20, 2014 Issued
Array ( [id] => 9599188 [patent_doc_number] => 20140195869 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-10 [patent_title] => 'SERIAL I/O USING JTAG TCK AND TMS SIGNALS' [patent_app_type] => utility [patent_app_number] => 14/158365 [patent_app_country] => US [patent_app_date] => 2014-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 15442 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14158365 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/158365
SERIAL I/O USING JTAG TCK AND TMS SIGNALS Jan 16, 2014 Abandoned
Array ( [id] => 9465459 [patent_doc_number] => 20140129886 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-08 [patent_title] => 'BOUNDARY SCAN PATH METHOD AND SYSTEM WITH FUNCTIONAL AND NON-FUNCTIONAL SCAN CELL MEMORIES' [patent_app_type] => utility [patent_app_number] => 14/151214 [patent_app_country] => US [patent_app_date] => 2014-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4743 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14151214 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/151214
BOUNDARY SCAN PATH METHOD AND SYSTEM WITH FUNCTIONAL AND NON-FUNCTIONAL SCAN CELL MEMORIES Jan 8, 2014 Abandoned
Array ( [id] => 10123608 [patent_doc_number] => 09157962 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-10-13 [patent_title] => 'Apparatus and method for testing a scan chain including modifying a first clock signal to simulate high-frequency operation associated with a second clock signal' [patent_app_type] => utility [patent_app_number] => 14/149090 [patent_app_country] => US [patent_app_date] => 2014-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4364 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14149090 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/149090
Apparatus and method for testing a scan chain including modifying a first clock signal to simulate high-frequency operation associated with a second clock signal Jan 6, 2014 Issued
Array ( [id] => 9451791 [patent_doc_number] => 20140122961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-01 [patent_title] => 'METHOD AND APPARATUS FOR CHANNEL CODING AND DECODING IN A COMMUNICATION SYSTEM USING A LOW-DENSITY PARITY-CHECK CODE' [patent_app_type] => utility [patent_app_number] => 14/148143 [patent_app_country] => US [patent_app_date] => 2014-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10616 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14148143 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/148143
Method and apparatus for channel coding and decoding in a communication system using a low-density parity-check code Jan 5, 2014 Issued
Array ( [id] => 9571745 [patent_doc_number] => 20140189458 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-03 [patent_title] => 'SOFT INPUT, SOFT OUPUT MAPPERS AND DEMAPPERS FOR BLOCK CODES' [patent_app_type] => utility [patent_app_number] => 14/146929 [patent_app_country] => US [patent_app_date] => 2014-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8532 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14146929 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/146929
Soft input, soft output mappers and demappers for block codes Jan 2, 2014 Issued
Array ( [id] => 10535934 [patent_doc_number] => 09261560 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-16 [patent_title] => 'Handling slower scan outputs at optimal frequency' [patent_app_type] => utility [patent_app_number] => 14/145293 [patent_app_country] => US [patent_app_date] => 2013-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5321 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14145293 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/145293
Handling slower scan outputs at optimal frequency Dec 30, 2013 Issued
Array ( [id] => 10098064 [patent_doc_number] => 09134371 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-15 [patent_title] => 'Translating operate state into operate scan paths, A, B, C' [patent_app_type] => utility [patent_app_number] => 14/095333 [patent_app_country] => US [patent_app_date] => 2013-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 13488 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14095333 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/095333
Translating operate state into operate scan paths, A, B, C Dec 2, 2013 Issued
Array ( [id] => 9386266 [patent_doc_number] => 20140089749 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-27 [patent_title] => 'APPARATUS FOR JTAG-DRIVEN REMOTE SCANNING' [patent_app_type] => utility [patent_app_number] => 14/094798 [patent_app_country] => US [patent_app_date] => 2013-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3729 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14094798 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/094798
Method for JTAG-driven remote scanning Dec 2, 2013 Issued
Array ( [id] => 9645139 [patent_doc_number] => 20140223251 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-07 [patent_title] => 'Multiple-Capture DFT System for Detecting or Locating Crossing Clock-Domain Faults During Scan-Test' [patent_app_type] => utility [patent_app_number] => 14/092044 [patent_app_country] => US [patent_app_date] => 2013-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 15382 [patent_no_of_claims] => 84 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14092044 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/092044
Multiple-capture DFT system for detecting or locating crossing clock-domain faults during scan-test Nov 26, 2013 Issued
Array ( [id] => 9974285 [patent_doc_number] => 09021322 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-28 [patent_title] => 'Probeless testing of pad buffers on wafer' [patent_app_type] => utility [patent_app_number] => 14/089069 [patent_app_country] => US [patent_app_date] => 2013-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 47 [patent_no_of_words] => 18702 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14089069 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/089069
Probeless testing of pad buffers on wafer Nov 24, 2013 Issued
Array ( [id] => 10517794 [patent_doc_number] => 09244842 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-26 [patent_title] => 'Data storage device with copy command' [patent_app_type] => utility [patent_app_number] => 14/087434 [patent_app_country] => US [patent_app_date] => 2013-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 11784 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14087434 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/087434
Data storage device with copy command Nov 21, 2013 Issued
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