
Cynthia H. Britt
Examiner (ID: 11869)
| Most Active Art Unit | 2117 |
| Art Unit(s) | 2117, 2111, 2133, 2138 |
| Total Applications | 1844 |
| Issued Applications | 1687 |
| Pending Applications | 80 |
| Abandoned Applications | 105 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
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[patent_title] => 'Information processing apparatus, information processing system, controlling method for information processing apparatus and program'
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Array
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[patent_issue_date] => 2013-06-18
[patent_title] => 'Data register control from TAP+ATC or discrete WSP signals'
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[patent_title] => 'Apparatus for JTAG-driven remote scanning'
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Array
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[patent_title] => 'REDUCED SIGNALING INTERFACE METHOD & APPARATUS'
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Array
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[patent_title] => 'INTEGRATED CIRCUIT WITH JTAG PORT, TAP LINKING MODULE, AND OFF-CHIP TAP INTERFACE PORT'
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Array
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[patent_title] => 'METHODOLOGY FOR CORRELATED MEMORY FAIL ESTIMATIONS'
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Array
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Array
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[patent_title] => 'Interposer TAP boundary register coupling stacked die functional input/output data'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/362717 | Interposer TAP boundary register coupling stacked die functional input/output data | Jan 30, 2012 | Issued |
Array
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[patent_title] => 'TAP with serial I/O coupled to TCK'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/357089 | TAP with serial I/O coupled to TCK | Jan 23, 2012 | Issued |
Array
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[patent_issue_date] => 2012-05-10
[patent_title] => 'PROBELESS TESTING OF PAD BUFFERS ON WAFER'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/352484 | Scan path switch testing of output buffer with ESD | Jan 17, 2012 | Issued |
Array
(
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[patent_title] => 'Test Scheduling With Pattern-Independent Test Access Mechanism'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/980287 | Test scheduling with pattern-independent test access mechanism | Jan 16, 2012 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/349279 | Semiconductor integrated circuit and power-supply voltage adaptive control system | Jan 11, 2012 | Issued |
Array
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Array
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[patent_title] => 'PARALLEL AND SERIAL ACCESS TO TEST COMPRESSION ARCHITECTURES'
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Array
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