Search

Cynthia H. Britt

Examiner (ID: 11869)

Most Active Art Unit
2117
Art Unit(s)
2117, 2111, 2133, 2138
Total Applications
1844
Issued Applications
1687
Pending Applications
80
Abandoned Applications
105

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19553443 [patent_doc_number] => 12137164 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-11-05 [patent_title] => Storage-free message authenticators for error-correcting-codes [patent_app_type] => utility [patent_app_number] => 18/447868 [patent_app_country] => US [patent_app_date] => 2023-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 14714 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18447868 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/447868
Storage-free message authenticators for error-correcting-codes Aug 9, 2023 Issued
Array ( [id] => 19733565 [patent_doc_number] => 12211565 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-28 [patent_title] => Storage device and read recovery method thereof [patent_app_type] => utility [patent_app_number] => 18/363734 [patent_app_country] => US [patent_app_date] => 2023-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 10561 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18363734 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/363734
Storage device and read recovery method thereof Aug 1, 2023 Issued
Array ( [id] => 19275526 [patent_doc_number] => 12025649 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-02 [patent_title] => Integrated circuit die test architecture [patent_app_type] => utility [patent_app_number] => 18/226924 [patent_app_country] => US [patent_app_date] => 2023-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 24 [patent_no_of_words] => 5081 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18226924 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/226924
Integrated circuit die test architecture Jul 26, 2023 Issued
Array ( [id] => 19919001 [patent_doc_number] => 12294387 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-06 [patent_title] => Decoding of error correction codes based on reverse diffusion [patent_app_type] => utility [patent_app_number] => 18/223121 [patent_app_country] => US [patent_app_date] => 2023-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 15919 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18223121 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/223121
Decoding of error correction codes based on reverse diffusion Jul 17, 2023 Issued
Array ( [id] => 19671527 [patent_doc_number] => 12184306 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-31 [patent_title] => Polar coder for channel encoding chain for wireless communications [patent_app_type] => utility [patent_app_number] => 18/353538 [patent_app_country] => US [patent_app_date] => 2023-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 21489 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18353538 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/353538
Polar coder for channel encoding chain for wireless communications Jul 16, 2023 Issued
Array ( [id] => 19267642 [patent_doc_number] => 20240211345 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => MEMORY CONTROLLER PERFORMING ERROR CORRECTION AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/349712 [patent_app_country] => US [patent_app_date] => 2023-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5423 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18349712 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/349712
Memory controller performing error correction and operating method thereof Jul 9, 2023 Issued
Array ( [id] => 19267642 [patent_doc_number] => 20240211345 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => MEMORY CONTROLLER PERFORMING ERROR CORRECTION AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/349712 [patent_app_country] => US [patent_app_date] => 2023-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5423 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18349712 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/349712
Memory controller performing error correction and operating method thereof Jul 9, 2023 Issued
Array ( [id] => 20265866 [patent_doc_number] => 12436858 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-07 [patent_title] => Scan synchronous-write-through testing architectures for a memory device [patent_app_type] => utility [patent_app_number] => 18/342819 [patent_app_country] => US [patent_app_date] => 2023-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4405 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18342819 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/342819
Scan synchronous-write-through testing architectures for a memory device Jun 27, 2023 Issued
Array ( [id] => 19978723 [patent_doc_number] => 12346198 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-01 [patent_title] => Selectable multi-stage error detection and correction [patent_app_type] => utility [patent_app_number] => 18/213828 [patent_app_country] => US [patent_app_date] => 2023-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5929 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18213828 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/213828
Selectable multi-stage error detection and correction Jun 23, 2023 Issued
Array ( [id] => 18710534 [patent_doc_number] => 20230333159 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => TEST ACCESS PORT WITH ADDRESS AND COMMAND CAPABILITY [patent_app_type] => utility [patent_app_number] => 18/211353 [patent_app_country] => US [patent_app_date] => 2023-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10253 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18211353 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/211353
Test access port with address and command capability Jun 18, 2023 Issued
Array ( [id] => 19460666 [patent_doc_number] => 12101186 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-24 [patent_title] => Soft FEC with parity check [patent_app_type] => utility [patent_app_number] => 18/210823 [patent_app_country] => US [patent_app_date] => 2023-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7568 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18210823 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/210823
Soft FEC with parity check Jun 15, 2023 Issued
Array ( [id] => 18694401 [patent_doc_number] => 20230324812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => 3D STACKED DIE TEST ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 18/208366 [patent_app_country] => US [patent_app_date] => 2023-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7145 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18208366 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/208366
3D stacked die test architecture Jun 11, 2023 Issued
Array ( [id] => 18650835 [patent_doc_number] => 20230296670 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => DEVICE ACCESS PORT SELECTION [patent_app_type] => utility [patent_app_number] => 18/200047 [patent_app_country] => US [patent_app_date] => 2023-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17648 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18200047 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/200047
Device access port selection May 21, 2023 Issued
Array ( [id] => 18810027 [patent_doc_number] => 20230384362 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => SPEED DETECTION CIRCUIT AND ASSOCIATED CHIP [patent_app_type] => utility [patent_app_number] => 18/198301 [patent_app_country] => US [patent_app_date] => 2023-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1940 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18198301 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/198301
SPEED DETECTION CIRCUIT AND ASSOCIATED CHIP May 16, 2023 Pending
Array ( [id] => 19858762 [patent_doc_number] => 12261623 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-25 [patent_title] => Decoding metadata encoded in error correction codes [patent_app_type] => utility [patent_app_number] => 18/316913 [patent_app_country] => US [patent_app_date] => 2023-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4371 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18316913 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/316913
Decoding metadata encoded in error correction codes May 11, 2023 Issued
Array ( [id] => 18650837 [patent_doc_number] => 20230296672 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => Process for Scan Chain in a Memory [patent_app_type] => utility [patent_app_number] => 18/144848 [patent_app_country] => US [patent_app_date] => 2023-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3291 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18144848 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/144848
Process for scan chain in a memory May 8, 2023 Issued
Array ( [id] => 18584127 [patent_doc_number] => 20230266389 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => TEST COMPRESSION IN A JTAG DAISY-CHAIN ENVIRONMENT [patent_app_type] => utility [patent_app_number] => 18/310016 [patent_app_country] => US [patent_app_date] => 2023-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14441 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18310016 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/310016
Test compression in a JTAG daisy-chain environment Apr 30, 2023 Issued
Array ( [id] => 20130976 [patent_doc_number] => 12373289 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Error correction incident tracking [patent_app_type] => utility [patent_app_number] => 18/310362 [patent_app_country] => US [patent_app_date] => 2023-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4965 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18310362 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/310362
Error correction incident tracking Apr 30, 2023 Issued
Array ( [id] => 19718868 [patent_doc_number] => 12204405 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-21 [patent_title] => Storage device determining quickly whether error correction decoding has failed and method of operating the storage device [patent_app_type] => utility [patent_app_number] => 18/309806 [patent_app_country] => US [patent_app_date] => 2023-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8021 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18309806 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/309806
Storage device determining quickly whether error correction decoding has failed and method of operating the storage device Apr 29, 2023 Issued
Array ( [id] => 19154317 [patent_doc_number] => 11979242 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-07 [patent_title] => Transmission method, apparatus, and computer-readable storage medium [patent_app_type] => utility [patent_app_number] => 18/306563 [patent_app_country] => US [patent_app_date] => 2023-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 20636 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18306563 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/306563
Transmission method, apparatus, and computer-readable storage medium Apr 24, 2023 Issued
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