
Cynthia H. Britt
Examiner (ID: 6795, Phone: (571)272-3815 , Office: P/2117 )
| Most Active Art Unit | 2117 |
| Art Unit(s) | 2117, 2133, 2111, 2138 |
| Total Applications | 1845 |
| Issued Applications | 1687 |
| Pending Applications | 84 |
| Abandoned Applications | 105 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9300195
[patent_doc_number] => 08648426
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-02-11
[patent_title] => 'Tunneling transistors'
[patent_app_type] => utility
[patent_app_number] => 12/971393
[patent_app_country] => US
[patent_app_date] => 2010-12-17
[patent_effective_date] => 0000-00-00
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[patent_figures_cnt] => 7
[patent_no_of_words] => 2864
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[patent_words_short_claim] => 94
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12971393
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/971393 | Tunneling transistors | Dec 16, 2010 | Issued |
Array
(
[id] => 5963168
[patent_doc_number] => 20110147793
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-06-23
[patent_title] => 'SiGe HETEROJUNCTION BIPOLAR TRANSISTOR MULTI-FINGER STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 12/971063
[patent_app_country] => US
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[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => publications/A1/0147/20110147793.pdf
[firstpage_image] =>[orig_patent_app_number] => 12971063
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/971063 | SiGe heterojunction bipolar transistor multi-finger structure | Dec 16, 2010 | Issued |
Array
(
[id] => 8248964
[patent_doc_number] => 20120153294
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-06-21
[patent_title] => 'Semiconductor Structures Having Directly Bonded Diamond Heat Sinks and Methods for Making Such Structures'
[patent_app_type] => utility
[patent_app_number] => 12/971224
[patent_app_country] => US
[patent_app_date] => 2010-12-17
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[patent_drawing_sheets_cnt] => 5
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[pdf_file] => publications/A1/0153/20120153294.pdf
[firstpage_image] =>[orig_patent_app_number] => 12971224
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/971224 | Semiconductor structures having directly bonded diamond heat sinks and methods for making such structures | Dec 16, 2010 | Issued |
Array
(
[id] => 8165969
[patent_doc_number] => 20120104361
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-03
[patent_title] => 'TRANSISTOR USING SOURCE ELECTRODE AND DRAIN ELECTRODE HAVING POINTED PORTIONS'
[patent_app_type] => utility
[patent_app_number] => 12/970962
[patent_app_country] => US
[patent_app_date] => 2010-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/970962 | TRANSISTOR USING SOURCE ELECTRODE AND DRAIN ELECTRODE HAVING POINTED PORTIONS | Dec 16, 2010 | Abandoned |
Array
(
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[patent_kind] => B2
[patent_issue_date] => 2013-01-01
[patent_title] => 'Light emitting diode package and manufacturing method thereof'
[patent_app_type] => utility
[patent_app_number] => 12/970976
[patent_app_country] => US
[patent_app_date] => 2010-12-17
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/970976 | Light emitting diode package and manufacturing method thereof | Dec 16, 2010 | Issued |
Array
(
[id] => 8629827
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[patent_kind] => B2
[patent_issue_date] => 2013-01-29
[patent_title] => 'Microelectronic flip chip packages with solder wetting pads and associated methods of manufacturing'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/970784 | Microelectronic flip chip packages with solder wetting pads and associated methods of manufacturing | Dec 15, 2010 | Issued |
Array
(
[id] => 8166035
[patent_doc_number] => 20120104388
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[patent_kind] => A1
[patent_issue_date] => 2012-05-03
[patent_title] => 'THREE-DIMENSIONAL STACKED SEMICONDUCTOR INTEGRATED CIRCUIT AND TSV REPAIR METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/970923
[patent_app_country] => US
[patent_app_date] => 2010-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[patent_no_of_words] => 4373
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[firstpage_image] =>[orig_patent_app_number] => 12970923
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/970923 | THREE-DIMENSIONAL STACKED SEMICONDUCTOR INTEGRATED CIRCUIT AND TSV REPAIR METHOD THEREOF | Dec 15, 2010 | Abandoned |
Array
(
[id] => 8435987
[patent_doc_number] => 08283758
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-10-09
[patent_title] => 'Microelectronic packages with enhanced heat dissipation and methods of manufacturing'
[patent_app_type] => utility
[patent_app_number] => 12/970729
[patent_app_country] => US
[patent_app_date] => 2010-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 3032
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/970729 | Microelectronic packages with enhanced heat dissipation and methods of manufacturing | Dec 15, 2010 | Issued |
Array
(
[id] => 6126838
[patent_doc_number] => 20110086489
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-04-14
[patent_title] => 'METHODS OF MANUFACTURING A HYBRID ELECTRICAL CONTACT'
[patent_app_type] => utility
[patent_app_number] => 12/970694
[patent_app_country] => US
[patent_app_date] => 2010-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[pdf_file] => publications/A1/0086/20110086489.pdf
[firstpage_image] =>[orig_patent_app_number] => 12970694
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/970694 | Methods of manufacturing a hybrid electrical contact | Dec 15, 2010 | Issued |
Array
(
[id] => 9031463
[patent_doc_number] => 20130234101
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-09-12
[patent_title] => 'NON-VOLATILE MEMORY DEVICE AND PRODUCTION METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/884331
[patent_app_country] => US
[patent_app_date] => 2010-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 37
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/884331 | Non-volatile memory device and production method thereof | Nov 21, 2010 | Issued |
Array
(
[id] => 8458565
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[patent_issue_date] => 2012-10-23
[patent_title] => 'Semiconductor device having dual-STI and manufacturing method thereof'
[patent_app_type] => utility
[patent_app_number] => 12/946311
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Array
(
[id] => 6145232
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[patent_title] => 'SELF-ALIGN PLANERIZED BOTTOM ELECTRODE PHASE CHANGE MEMORY AND MANUFACTURING METHOD'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/899991 | Self-align planerized bottom electrode phase change memory and manufacturing method | Oct 6, 2010 | Issued |
Array
(
[id] => 8487022
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[patent_title] => 'Method of Producing a Semiconductor Device and Semiconductor Device Having a Through-Wafer Interconnect'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/499899 | Method of producing a semiconductor device and semiconductor device having a through-wafer interconnect | Sep 27, 2010 | Issued |
Array
(
[id] => 4634353
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[patent_title] => 'Vertically stacked pre-packaged integrated circuit chips'
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Array
(
[id] => 8474439
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[patent_title] => 'Sensor for Detecting a Component of a Gas Mixture'
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Array
(
[id] => 6256146
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/850783 | Semiconductor device and manufacturing method thereof | Aug 4, 2010 | Issued |
Array
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[patent_title] => 'SEMICONDUCTOR DEVICE INCLUDING SEMICONDUCTOR THIN FILM, WHICH IS SUBJECTED TO HEAT TREATMENT TO HAVE ALIGNMENT MARK, CRYSTALLIZING METHOD FOR THE SEMICONDUCTOR THIN FILM, AND CRYSTALLIZING APPARATUS FOR THE SEMICONDUCTOR THIN FILM'
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Array
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/815109 | Nanocrystal based universal memory cells, and memory cells | Jun 13, 2010 | Issued |