Search

Cynthia M Fogg

Examiner (ID: 1458, Phone: (571)272-2741 , Office: P/2427 )

Most Active Art Unit
2421
Art Unit(s)
2427, 2421
Total Applications
447
Issued Applications
302
Pending Applications
50
Abandoned Applications
95

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16928464 [patent_doc_number] => 11049956 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-29 [patent_title] => Method of forming a semiconductor device [patent_app_type] => utility [patent_app_number] => 16/545826 [patent_app_country] => US [patent_app_date] => 2019-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7569 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 347 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16545826 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/545826
Method of forming a semiconductor device Aug 19, 2019 Issued
Array ( [id] => 15531303 [patent_doc_number] => 20200057957 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-20 [patent_title] => Quantum Computer with Improved Quantum Optimization by Exploiting Marginal Data [patent_app_type] => utility [patent_app_number] => 16/543165 [patent_app_country] => US [patent_app_date] => 2019-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16086 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16543165 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/543165
Quantum Computer with Improved Quantum Optimization by Exploiting Marginal Data Aug 15, 2019 Abandoned
Array ( [id] => 17115962 [patent_doc_number] => 20210296559 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => SUPERCONDUCTING QUANTUM COMPUTING CIRCUIT PACKAGE [patent_app_type] => utility [patent_app_number] => 17/267057 [patent_app_country] => US [patent_app_date] => 2019-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7647 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17267057 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/267057
Superconducting quantum computing circuit package Aug 12, 2019 Issued
Array ( [id] => 16034835 [patent_doc_number] => 10679849 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-09 [patent_title] => Electric field assisted placement of nanomaterials through dielectric engineering [patent_app_type] => utility [patent_app_number] => 16/539071 [patent_app_country] => US [patent_app_date] => 2019-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 20 [patent_no_of_words] => 6002 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16539071 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/539071
Electric field assisted placement of nanomaterials through dielectric engineering Aug 12, 2019 Issued
Array ( [id] => 15906803 [patent_doc_number] => 20200152922 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => MANUFACTURING METHOD OF FILM LAYER, DISPLAY SUBSTRATE AND MANUFACTURING METHOD THEREOF AND DEVICE THEREOF [patent_app_type] => utility [patent_app_number] => 16/534172 [patent_app_country] => US [patent_app_date] => 2019-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6784 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16534172 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/534172
MANUFACTURING METHOD OF FILM LAYER, DISPLAY SUBSTRATE AND MANUFACTURING METHOD THEREOF AND DEVICE THEREOF Aug 6, 2019 Abandoned
Array ( [id] => 16625144 [patent_doc_number] => 20210043797 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-11 [patent_title] => TRANSFER HEAD AND METHOD OF MANUFACTURING MICRO LED DISPLAY USING SAME [patent_app_type] => utility [patent_app_number] => 16/534699 [patent_app_country] => US [patent_app_date] => 2019-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 30188 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16534699 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/534699
Transfer head and method of manufacturing micro LED display using same Aug 6, 2019 Issued
Array ( [id] => 17431952 [patent_doc_number] => 20220059661 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-24 [patent_title] => OXIDE SEMICONDUCTOR MATERIAL, THIN FILM TRANSISTOR AND PREPARATION METHOD THEREFOR, AND DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 17/312885 [patent_app_country] => US [patent_app_date] => 2019-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5664 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17312885 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/312885
OXIDE SEMICONDUCTOR MATERIAL, THIN FILM TRANSISTOR AND PREPARATION METHOD THEREFOR, AND DISPLAY PANEL Jul 22, 2019 Pending
Array ( [id] => 17590862 [patent_doc_number] => 11329139 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-10 [patent_title] => Semiconductor device with reduced trap defect and method of forming the same [patent_app_type] => utility [patent_app_number] => 16/514373 [patent_app_country] => US [patent_app_date] => 2019-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 61 [patent_no_of_words] => 9604 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16514373 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/514373
Semiconductor device with reduced trap defect and method of forming the same Jul 16, 2019 Issued
Array ( [id] => 15414949 [patent_doc_number] => 20200027797 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-23 [patent_title] => MANUFACTURING METHOD AND EVALUATION METHOD FOR SiC DEVICE [patent_app_type] => utility [patent_app_number] => 16/514114 [patent_app_country] => US [patent_app_date] => 2019-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4279 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16514114 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/514114
Manufacturing method and evaluation method for SiC device Jul 16, 2019 Issued
Array ( [id] => 15415293 [patent_doc_number] => 20200027969 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-23 [patent_title] => Method for Producing a Semiconductor Component [patent_app_type] => utility [patent_app_number] => 16/514292 [patent_app_country] => US [patent_app_date] => 2019-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8796 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16514292 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/514292
Method for producing a semiconductor component Jul 16, 2019 Issued
Array ( [id] => 17795565 [patent_doc_number] => 20220254657 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-11 [patent_title] => MODULE FOR REMOVING MIS-ASSEMBLED SEMICONDUCTOR LIGHT-EMITTING ELEMENT AND METHOD FOR REMOVING MIS-ASSEMBLED SEMICONDUCTOR LIGHT-EMITTING ELEMENT BY USING SAME [patent_app_type] => utility [patent_app_number] => 17/627110 [patent_app_country] => US [patent_app_date] => 2019-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9672 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17627110 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/627110
MODULE FOR REMOVING MIS-ASSEMBLED SEMICONDUCTOR LIGHT-EMITTING ELEMENT AND METHOD FOR REMOVING MIS-ASSEMBLED SEMICONDUCTOR LIGHT-EMITTING ELEMENT BY USING SAME Jul 15, 2019 Pending
Array ( [id] => 16574893 [patent_doc_number] => 10896819 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-19 [patent_title] => Backside metal photolithographic patterning die singulation systems and related methods [patent_app_type] => utility [patent_app_number] => 16/505925 [patent_app_country] => US [patent_app_date] => 2019-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 5366 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16505925 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/505925
Backside metal photolithographic patterning die singulation systems and related methods Jul 8, 2019 Issued
Array ( [id] => 16210391 [patent_doc_number] => 20200243381 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => BACKSIDE METAL PATTERNING DIE SINGULATION SYSTEMS AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 16/505902 [patent_app_country] => US [patent_app_date] => 2019-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4265 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16505902 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/505902
Backside metal patterning die singulation systems and related methods Jul 8, 2019 Issued
Array ( [id] => 15414869 [patent_doc_number] => 20200027757 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-23 [patent_title] => Die Transfer Method and Die Transfer System Thereof [patent_app_type] => utility [patent_app_number] => 16/505904 [patent_app_country] => US [patent_app_date] => 2019-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3312 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16505904 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/505904
Die Transfer Method and Die Transfer System Thereof Jul 8, 2019 Abandoned
Array ( [id] => 17063150 [patent_doc_number] => 11107760 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-31 [patent_title] => Semiconductor device, electric power conversion apparatus and method for manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 16/452001 [patent_app_country] => US [patent_app_date] => 2019-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4908 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16452001 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/452001
Semiconductor device, electric power conversion apparatus and method for manufacturing semiconductor device Jun 24, 2019 Issued
Array ( [id] => 16542857 [patent_doc_number] => 20200409272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => Fabricating Sub-Lithographic Devices [patent_app_type] => utility [patent_app_number] => 16/452302 [patent_app_country] => US [patent_app_date] => 2019-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18627 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 316 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16452302 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/452302
Fabricating Sub-Lithographic Devices Jun 24, 2019 Abandoned
Array ( [id] => 17752792 [patent_doc_number] => 20220230997 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-21 [patent_title] => DISPLAY DEVICE USING MICRO LED AND MANUFACTURING METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 17/616553 [patent_app_country] => US [patent_app_date] => 2019-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13718 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17616553 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/616553
DISPLAY DEVICE USING MICRO LED AND MANUFACTURING METHOD THEREFOR Jun 11, 2019 Pending
Array ( [id] => 16409996 [patent_doc_number] => 10818560 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-27 [patent_title] => Vertical field-effect transistor (VFET) devices and methods of forming the same [patent_app_type] => utility [patent_app_number] => 16/434211 [patent_app_country] => US [patent_app_date] => 2019-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 5244 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16434211 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/434211
Vertical field-effect transistor (VFET) devices and methods of forming the same Jun 6, 2019 Issued
Array ( [id] => 18493669 [patent_doc_number] => 11699088 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-11 [patent_title] => Calibration of quantum processor operator parameters [patent_app_type] => utility [patent_app_number] => 16/434513 [patent_app_country] => US [patent_app_date] => 2019-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 13388 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 284 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16434513 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/434513
Calibration of quantum processor operator parameters Jun 6, 2019 Issued
Array ( [id] => 17109076 [patent_doc_number] => 11129314 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-21 [patent_title] => Stepped component assembly accommodated within a stepped cavity in component carrier [patent_app_type] => utility [patent_app_number] => 16/434962 [patent_app_country] => US [patent_app_date] => 2019-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 15 [patent_no_of_words] => 11740 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16434962 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/434962
Stepped component assembly accommodated within a stepped cavity in component carrier Jun 6, 2019 Issued
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