Search

Cynthia Ramirez

Examiner (ID: 8388, Phone: (571)272-2608 , Office: P/2911 )

Most Active Art Unit
2911
Art Unit(s)
2900, 2901, 2911
Total Applications
5566
Issued Applications
5495
Pending Applications
0
Abandoned Applications
71

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16659413 [patent_doc_number] => 20210056050 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-25 [patent_title] => PREPROCESSING DETERMINATION APPARATUS, PREPROCESSING DETERMINATION METHOD, AND PROGRAM [patent_app_type] => utility [patent_app_number] => 16/962385 [patent_app_country] => US [patent_app_date] => 2018-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8104 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16962385 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/962385
PREPROCESSING DETERMINATION APPARATUS, PREPROCESSING DETERMINATION METHOD, AND PROGRAM Nov 28, 2018 Abandoned
Array ( [id] => 13627145 [patent_doc_number] => 20180365124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-20 [patent_title] => LOG ANALYSIS SYSTEM, LOG ANALYSIS METHOD, AND LOG ANALYSIS PROGRAM [patent_app_type] => utility [patent_app_number] => 16/060138 [patent_app_country] => US [patent_app_date] => 2016-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9735 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16060138 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/060138
LOG ANALYSIS SYSTEM, LOG ANALYSIS METHOD, AND LOG ANALYSIS PROGRAM Dec 7, 2016 Abandoned
Array ( [id] => 8623379 [patent_doc_number] => 08356300 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-15 [patent_title] => 'Multi-threaded processes for opening and saving documents' [patent_app_type] => utility [patent_app_number] => 13/569595 [patent_app_country] => US [patent_app_date] => 2012-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8170 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13569595 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/569595
Multi-threaded processes for opening and saving documents Aug 7, 2012 Issued
Array ( [id] => 7521025 [patent_doc_number] => 07975133 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-07-05 [patent_title] => 'Method for repairing a speculative global history record' [patent_app_type] => utility [patent_app_number] => 13/016986 [patent_app_country] => US [patent_app_date] => 2011-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4886 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/975/07975133.pdf [firstpage_image] =>[orig_patent_app_number] => 13016986 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/016986
Method for repairing a speculative global history record Jan 28, 2011 Issued
Array ( [id] => 8260008 [patent_doc_number] => 08209522 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-26 [patent_title] => 'System and method for extracting fields from packets having fields spread over more than one register' [patent_app_type] => utility [patent_app_number] => 12/985680 [patent_app_country] => US [patent_app_date] => 2011-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 3397 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12985680 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/985680
System and method for extracting fields from packets having fields spread over more than one register Jan 5, 2011 Issued
Array ( [id] => 6204039 [patent_doc_number] => 20110066825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-17 [patent_title] => 'MESSAGE ROUTING SCHEME' [patent_app_type] => utility [patent_app_number] => 12/949690 [patent_app_country] => US [patent_app_date] => 2010-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5689 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0066/20110066825.pdf [firstpage_image] =>[orig_patent_app_number] => 12949690 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/949690
Message routing scheme for an array having a switch with address comparing component and message routing component Nov 17, 2010 Issued
Array ( [id] => 7517844 [patent_doc_number] => 08041926 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-18 [patent_title] => 'Transparent concurrent atomic execution' [patent_app_type] => utility [patent_app_number] => 12/899246 [patent_app_country] => US [patent_app_date] => 2010-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 6839 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/041/08041926.pdf [firstpage_image] =>[orig_patent_app_number] => 12899246 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/899246
Transparent concurrent atomic execution Oct 5, 2010 Issued
Array ( [id] => 7785740 [patent_doc_number] => 20120047296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-23 [patent_title] => 'CONTROL MODULE FOR COMMUNICAION NETWORKS AND METHOD FOR USING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/886669 [patent_app_country] => US [patent_app_date] => 2010-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1916 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20120047296.pdf [firstpage_image] =>[orig_patent_app_number] => 12886669 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/886669
CONTROL MODULE FOR COMMUNICAION NETWORKS AND METHOD FOR USING THE SAME Sep 20, 2010 Abandoned
Array ( [id] => 4488306 [patent_doc_number] => 07908462 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-15 [patent_title] => 'Virtual world simulation systems and methods utilizing parallel coprocessors, and computer program products thereof' [patent_app_type] => utility [patent_app_number] => 12/797416 [patent_app_country] => US [patent_app_date] => 2010-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11844 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 329 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/908/07908462.pdf [firstpage_image] =>[orig_patent_app_number] => 12797416 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/797416
Virtual world simulation systems and methods utilizing parallel coprocessors, and computer program products thereof Jun 8, 2010 Issued
Array ( [id] => 6532281 [patent_doc_number] => 20100217954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-26 [patent_title] => 'Method and apparatus for obtaining a scalar value directly from a vector register' [patent_app_type] => utility [patent_app_number] => 12/662745 [patent_app_country] => US [patent_app_date] => 2010-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9022 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0217/20100217954.pdf [firstpage_image] =>[orig_patent_app_number] => 12662745 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/662745
Method and apparatus for obtaining a scalar value directly from a vector register May 2, 2010 Issued
Array ( [id] => 7734551 [patent_doc_number] => 08103854 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-01-24 [patent_title] => 'Methods and apparatus for independent processor node operations in a SIMD array processor' [patent_app_type] => utility [patent_app_number] => 12/758758 [patent_app_country] => US [patent_app_date] => 2010-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4780 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/103/08103854.pdf [firstpage_image] =>[orig_patent_app_number] => 12758758 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/758758
Methods and apparatus for independent processor node operations in a SIMD array processor Apr 11, 2010 Issued
Array ( [id] => 8033573 [patent_doc_number] => 08145883 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-27 [patent_title] => 'Preloading instructions from an instruction set other than a currently executing instruction set' [patent_app_type] => utility [patent_app_number] => 12/722962 [patent_app_country] => US [patent_app_date] => 2010-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3708 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/145/08145883.pdf [firstpage_image] =>[orig_patent_app_number] => 12722962 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/722962
Preloading instructions from an instruction set other than a currently executing instruction set Mar 11, 2010 Issued
Array ( [id] => 4499622 [patent_doc_number] => 07904705 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-08 [patent_title] => 'System and method for repairing a speculative global history record' [patent_app_type] => utility [patent_app_number] => 12/722220 [patent_app_country] => US [patent_app_date] => 2010-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4845 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/904/07904705.pdf [firstpage_image] =>[orig_patent_app_number] => 12722220 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/722220
System and method for repairing a speculative global history record Mar 10, 2010 Issued
Array ( [id] => 4602842 [patent_doc_number] => 07979686 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-07-12 [patent_title] => 'System and method for isochronous task switching via hardware scheduling' [patent_app_type] => utility [patent_app_number] => 12/710839 [patent_app_country] => US [patent_app_date] => 2010-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4830 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/979/07979686.pdf [firstpage_image] =>[orig_patent_app_number] => 12710839 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/710839
System and method for isochronous task switching via hardware scheduling Feb 22, 2010 Issued
Array ( [id] => 8247124 [patent_doc_number] => 08205067 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-19 [patent_title] => 'Context switching and synchronization' [patent_app_type] => utility [patent_app_number] => 12/685443 [patent_app_country] => US [patent_app_date] => 2010-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 12118 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/205/08205067.pdf [firstpage_image] =>[orig_patent_app_number] => 12685443 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/685443
Context switching and synchronization Jan 10, 2010 Issued
Array ( [id] => 6511581 [patent_doc_number] => 20100095151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-15 [patent_title] => 'Processor Apparatus for Executing Instructions with Local Slack Prediction of Instructions and Processing Method Therefor' [patent_app_type] => utility [patent_app_number] => 12/634069 [patent_app_country] => US [patent_app_date] => 2009-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 47 [patent_no_of_words] => 46325 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20100095151.pdf [firstpage_image] =>[orig_patent_app_number] => 12634069 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/634069
Processor Apparatus for Executing Instructions with Local Slack Prediction of Instructions and Processing Method Therefor Dec 8, 2009 Abandoned
Array ( [id] => 8645607 [patent_doc_number] => 08370605 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-05 [patent_title] => 'Computer architecture for a mobile communication platform' [patent_app_type] => utility [patent_app_number] => 12/616146 [patent_app_country] => US [patent_app_date] => 2009-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6888 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 329 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12616146 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/616146
Computer architecture for a mobile communication platform Nov 10, 2009 Issued
Array ( [id] => 6553780 [patent_doc_number] => 20100272162 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-28 [patent_title] => 'Synchronous serial programmable interface' [patent_app_type] => utility [patent_app_number] => 12/604193 [patent_app_country] => US [patent_app_date] => 2009-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8031 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0272/20100272162.pdf [firstpage_image] =>[orig_patent_app_number] => 12604193 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/604193
Synchronous serial programmable interface Oct 21, 2009 Abandoned
Array ( [id] => 4462368 [patent_doc_number] => 07895423 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-22 [patent_title] => 'Method for extracting fields from packets having fields spread over more than one register' [patent_app_type] => utility [patent_app_number] => 12/544167 [patent_app_country] => US [patent_app_date] => 2009-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 3378 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/895/07895423.pdf [firstpage_image] =>[orig_patent_app_number] => 12544167 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/544167
Method for extracting fields from packets having fields spread over more than one register Aug 18, 2009 Issued
Array ( [id] => 8149261 [patent_doc_number] => 08166281 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-24 [patent_title] => 'Implementing instruction set architectures with non-contiguous register file specifiers' [patent_app_type] => utility [patent_app_number] => 12/534968 [patent_app_country] => US [patent_app_date] => 2009-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 28 [patent_no_of_words] => 15860 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/166/08166281.pdf [firstpage_image] =>[orig_patent_app_number] => 12534968 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/534968
Implementing instruction set architectures with non-contiguous register file specifiers Aug 3, 2009 Issued
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