Search

Cynthia Segura

Examiner (ID: 5880, Phone: (571)270-3580 , Office: P/2662 )

Most Active Art Unit
2698
Art Unit(s)
2639, 2662, 2697, 2622, 2698, 4115
Total Applications
878
Issued Applications
687
Pending Applications
16
Abandoned Applications
188

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4269554 [patent_doc_number] => 06245607 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-12 [patent_title] => 'Buried channel quasi-unipolar transistor' [patent_app_type] => 1 [patent_app_number] => 9/222270 [patent_app_country] => US [patent_app_date] => 1998-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 28 [patent_no_of_words] => 7741 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/245/06245607.pdf [firstpage_image] =>[orig_patent_app_number] => 222270 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/222270
Buried channel quasi-unipolar transistor Dec 27, 1998 Issued
Array ( [id] => 1587848 [patent_doc_number] => 06359317 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Vertical PNP bipolar transistor and its method of fabrication' [patent_app_type] => B1 [patent_app_number] => 09/222587 [patent_app_country] => US [patent_app_date] => 1998-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 21 [patent_no_of_words] => 2984 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/359/06359317.pdf [firstpage_image] =>[orig_patent_app_number] => 09222587 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/222587
Vertical PNP bipolar transistor and its method of fabrication Dec 27, 1998 Issued
Array ( [id] => 1433533 [patent_doc_number] => 06340823 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-22 [patent_title] => 'Semiconductor wafer having a multi-test circuit, and method for manufacturing a semiconductor device including multi-test process' [patent_app_type] => B1 [patent_app_number] => 09/215200 [patent_app_country] => US [patent_app_date] => 1998-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 5291 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/340/06340823.pdf [firstpage_image] =>[orig_patent_app_number] => 09215200 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/215200
Semiconductor wafer having a multi-test circuit, and method for manufacturing a semiconductor device including multi-test process Dec 17, 1998 Issued
Array ( [id] => 4411794 [patent_doc_number] => 06172403 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'Electrostatic discharge protection circuit triggered by floating-base transistor' [patent_app_type] => 1 [patent_app_number] => 9/212317 [patent_app_country] => US [patent_app_date] => 1998-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2621 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/172/06172403.pdf [firstpage_image] =>[orig_patent_app_number] => 212317 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/212317
Electrostatic discharge protection circuit triggered by floating-base transistor Dec 14, 1998 Issued
Array ( [id] => 4094676 [patent_doc_number] => 06133603 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'Memory device and memory array' [patent_app_type] => 1 [patent_app_number] => 9/207030 [patent_app_country] => US [patent_app_date] => 1998-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 25 [patent_no_of_words] => 9326 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/133/06133603.pdf [firstpage_image] =>[orig_patent_app_number] => 207030 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/207030
Memory device and memory array Dec 7, 1998 Issued
Array ( [id] => 4254511 [patent_doc_number] => 06222230 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Method of making an elevated source/drain with enhanced graded sidewalls for transistor scaling integrated with spacer formation' [patent_app_type] => 1 [patent_app_number] => 9/204967 [patent_app_country] => US [patent_app_date] => 1998-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 5262 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/222/06222230.pdf [firstpage_image] =>[orig_patent_app_number] => 204967 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/204967
Method of making an elevated source/drain with enhanced graded sidewalls for transistor scaling integrated with spacer formation Dec 2, 1998 Issued
Array ( [id] => 4363555 [patent_doc_number] => 06169310 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-02 [patent_title] => 'Electrostatic discharge protection device' [patent_app_type] => 1 [patent_app_number] => 9/205110 [patent_app_country] => US [patent_app_date] => 1998-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 4857 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 376 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/169/06169310.pdf [firstpage_image] =>[orig_patent_app_number] => 205110 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/205110
Electrostatic discharge protection device Dec 2, 1998 Issued
Array ( [id] => 4244152 [patent_doc_number] => 06091125 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-18 [patent_title] => 'Micromechanical electronic device' [patent_app_type] => 1 [patent_app_number] => 9/204517 [patent_app_country] => US [patent_app_date] => 1998-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1823 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/091/06091125.pdf [firstpage_image] =>[orig_patent_app_number] => 204517 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/204517
Micromechanical electronic device Dec 1, 1998 Issued
Array ( [id] => 4070416 [patent_doc_number] => 06008513 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-28 [patent_title] => 'Dynamic random access memory (DRAM) cells with minimum active cell areas using sidewall-space bit lines' [patent_app_type] => 1 [patent_app_number] => 9/196750 [patent_app_country] => US [patent_app_date] => 1998-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 23 [patent_no_of_words] => 4651 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/008/06008513.pdf [firstpage_image] =>[orig_patent_app_number] => 196750 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/196750
Dynamic random access memory (DRAM) cells with minimum active cell areas using sidewall-space bit lines Nov 19, 1998 Issued
Array ( [id] => 4422362 [patent_doc_number] => 06194741 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-27 [patent_title] => 'MOSgated trench type power semiconductor with silicon carbide substrate and increased gate breakdown voltage and reduced on-resistance' [patent_app_type] => 1 [patent_app_number] => 9/185110 [patent_app_country] => US [patent_app_date] => 1998-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2950 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/194/06194741.pdf [firstpage_image] =>[orig_patent_app_number] => 185110 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/185110
MOSgated trench type power semiconductor with silicon carbide substrate and increased gate breakdown voltage and reduced on-resistance Nov 2, 1998 Issued
Array ( [id] => 1554603 [patent_doc_number] => 06348700 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-19 [patent_title] => 'Monomolecular rectifying wire and logic based thereupon' [patent_app_type] => B1 [patent_app_number] => 09/178747 [patent_app_country] => US [patent_app_date] => 1998-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 39 [patent_no_of_words] => 10000 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/348/06348700.pdf [firstpage_image] =>[orig_patent_app_number] => 09178747 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/178747
Monomolecular rectifying wire and logic based thereupon Oct 26, 1998 Issued
Array ( [id] => 4163223 [patent_doc_number] => 06114739 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-05 [patent_title] => 'Elevated pin diode active pixel sensor which includes a patterned doped semiconductor electrode' [patent_app_type] => 1 [patent_app_number] => 9/174717 [patent_app_country] => US [patent_app_date] => 1998-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3410 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/114/06114739.pdf [firstpage_image] =>[orig_patent_app_number] => 174717 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/174717
Elevated pin diode active pixel sensor which includes a patterned doped semiconductor electrode Oct 18, 1998 Issued
Array ( [id] => 4108106 [patent_doc_number] => 06100548 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Modulation-doped field-effect transistors and fabrication processes' [patent_app_type] => 1 [patent_app_number] => 9/168270 [patent_app_country] => US [patent_app_date] => 1998-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3271 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/100/06100548.pdf [firstpage_image] =>[orig_patent_app_number] => 168270 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/168270
Modulation-doped field-effect transistors and fabrication processes Oct 6, 1998 Issued
Array ( [id] => 4189502 [patent_doc_number] => 06150704 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-21 [patent_title] => 'Photoelectric conversion apparatus and image sensor' [patent_app_type] => 1 [patent_app_number] => 9/164277 [patent_app_country] => US [patent_app_date] => 1998-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 6047 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/150/06150704.pdf [firstpage_image] =>[orig_patent_app_number] => 164277 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/164277
Photoelectric conversion apparatus and image sensor Sep 30, 1998 Issued
Array ( [id] => 4108335 [patent_doc_number] => 06100564 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'SOI pass-gate disturb solution' [patent_app_type] => 1 [patent_app_number] => 9/163950 [patent_app_country] => US [patent_app_date] => 1998-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2166 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/100/06100564.pdf [firstpage_image] =>[orig_patent_app_number] => 163950 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/163950
SOI pass-gate disturb solution Sep 29, 1998 Issued
Array ( [id] => 3931450 [patent_doc_number] => 05952672 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-14 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => 1 [patent_app_number] => 9/161827 [patent_app_country] => US [patent_app_date] => 1998-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 6403 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/952/05952672.pdf [firstpage_image] =>[orig_patent_app_number] => 161827 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/161827
Semiconductor device and method for fabricating the same Sep 28, 1998 Issued
Array ( [id] => 4363539 [patent_doc_number] => 06169309 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-02 [patent_title] => 'High breakdown-voltage transistor with transient protection' [patent_app_type] => 1 [patent_app_number] => 9/159947 [patent_app_country] => US [patent_app_date] => 1998-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 2477 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/169/06169309.pdf [firstpage_image] =>[orig_patent_app_number] => 159947 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/159947
High breakdown-voltage transistor with transient protection Sep 23, 1998 Issued
Array ( [id] => 3989793 [patent_doc_number] => 05959335 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-28 [patent_title] => 'Device design for enhanced avalanche SOI CMOS' [patent_app_type] => 1 [patent_app_number] => 9/159307 [patent_app_country] => US [patent_app_date] => 1998-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1720 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/959/05959335.pdf [firstpage_image] =>[orig_patent_app_number] => 159307 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/159307
Device design for enhanced avalanche SOI CMOS Sep 22, 1998 Issued
Array ( [id] => 4254117 [patent_doc_number] => 06222205 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Layered semiconductor structure for lateral current spreading, and light emitting diode including such a current spreading structure' [patent_app_type] => 1 [patent_app_number] => 9/154727 [patent_app_country] => US [patent_app_date] => 1998-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 5845 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/222/06222205.pdf [firstpage_image] =>[orig_patent_app_number] => 154727 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/154727
Layered semiconductor structure for lateral current spreading, and light emitting diode including such a current spreading structure Sep 15, 1998 Issued
Array ( [id] => 4103089 [patent_doc_number] => 06049112 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-11 [patent_title] => 'Reduced capacitance transistor with electro-static discharge protection structure and method for forming the same' [patent_app_type] => 1 [patent_app_number] => 9/152847 [patent_app_country] => US [patent_app_date] => 1998-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2201 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/049/06049112.pdf [firstpage_image] =>[orig_patent_app_number] => 152847 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/152847
Reduced capacitance transistor with electro-static discharge protection structure and method for forming the same Sep 13, 1998 Issued
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