
D. Gabrielle Brouillette
Examiner (ID: 5484)
| Most Active Art Unit | 1502 |
| Art Unit(s) | 1615, 1502, 1721 |
| Total Applications | 827 |
| Issued Applications | 554 |
| Pending Applications | 72 |
| Abandoned Applications | 201 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8891700
[patent_doc_number] => 20130164884
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-06-27
[patent_title] => 'ASSEMBLY OF QUASICRYSTALLINE PHOTONIC HETEROSTRUCTURES'
[patent_app_type] => utility
[patent_app_number] => 13/773248
[patent_app_country] => US
[patent_app_date] => 2013-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/773248 | ASSEMBLY OF QUASICRYSTALLINE PHOTONIC HETEROSTRUCTURES | Feb 20, 2013 | Abandoned |
Array
(
[id] => 8880834
[patent_doc_number] => 20130154018
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-06-20
[patent_title] => 'SEMICONDUCTOR DEVICE COMPRISING SELF-ALIGNED CONTACT BARS AND METAL LINES WITH INCREASED VIA LANDING REGIONS'
[patent_app_type] => utility
[patent_app_number] => 13/769446
[patent_app_country] => US
[patent_app_date] => 2013-02-18
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/769446 | Semiconductor device comprising self-aligned contact bars and metal lines with increased via landing regions | Feb 17, 2013 | Issued |
Array
(
[id] => 10152031
[patent_doc_number] => 09184331
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[patent_kind] => B2
[patent_issue_date] => 2015-11-10
[patent_title] => 'Method for reducing tilt of optical unit during manufacture of image sensor'
[patent_app_type] => utility
[patent_app_number] => 13/766568
[patent_app_country] => US
[patent_app_date] => 2013-02-13
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Array
(
[id] => 8829366
[patent_doc_number] => 20130130411
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-23
[patent_title] => 'Interleaf for Leadframe Identification'
[patent_app_type] => utility
[patent_app_number] => 13/746067
[patent_app_country] => US
[patent_app_date] => 2013-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/746067 | Interleaf for Leadframe Identification | Jan 20, 2013 | Abandoned |
Array
(
[id] => 13093647
[patent_doc_number] => 10066158
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[patent_kind] => B2
[patent_issue_date] => 2018-09-04
[patent_title] => Molded nanoparticle phosphor for light emitting applications
[patent_app_type] => utility
[patent_app_number] => 13/743414
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/743414 | Molded nanoparticle phosphor for light emitting applications | Jan 16, 2013 | Issued |
Array
(
[id] => 10870142
[patent_doc_number] => 08895337
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[patent_kind] => B1
[patent_issue_date] => 2014-11-25
[patent_title] => 'Method of fabricating vertically aligned group III-V nanowires'
[patent_app_type] => utility
[patent_app_number] => 13/743433
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[patent_app_date] => 2013-01-17
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/743433 | Method of fabricating vertically aligned group III-V nanowires | Jan 16, 2013 | Issued |
Array
(
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[patent_doc_number] => 09252289
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[patent_kind] => B2
[patent_issue_date] => 2016-02-02
[patent_title] => 'Non-volatile semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 13/743485
[patent_app_country] => US
[patent_app_date] => 2013-01-17
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/743485 | Non-volatile semiconductor memory device | Jan 16, 2013 | Issued |
Array
(
[id] => 10035334
[patent_doc_number] => 09076655
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-07-07
[patent_title] => 'Semiconductor device and method of forming through-silicon-via with sacrificial layer'
[patent_app_type] => utility
[patent_app_number] => 13/743054
[patent_app_country] => US
[patent_app_date] => 2013-01-16
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13743054
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/743054 | Semiconductor device and method of forming through-silicon-via with sacrificial layer | Jan 15, 2013 | Issued |
Array
(
[id] => 8950726
[patent_doc_number] => 20130196507
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-08-01
[patent_title] => 'Method Of Depositing Metals Using High Frequency Plasma'
[patent_app_type] => utility
[patent_app_number] => 13/742596
[patent_app_country] => US
[patent_app_date] => 2013-01-16
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/742596 | Method of depositing metals using high frequency plasma | Jan 15, 2013 | Issued |
Array
(
[id] => 10118605
[patent_doc_number] => 09153493
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2015-10-06
[patent_title] => 'System for separating devices from a semiconductor wafer'
[patent_app_type] => utility
[patent_app_number] => 13/742562
[patent_app_country] => US
[patent_app_date] => 2013-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/742562 | System for separating devices from a semiconductor wafer | Jan 15, 2013 | Issued |
Array
(
[id] => 9491172
[patent_doc_number] => 20140141578
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-05-22
[patent_title] => 'LOCAL TAILORING OF FINGERS IN MULTI-FINGER FIN FIELD EFFECT TRANSISTORS'
[patent_app_type] => utility
[patent_app_number] => 13/741978
[patent_app_country] => US
[patent_app_date] => 2013-01-15
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/741978 | LOCAL TAILORING OF FINGERS IN MULTI-FINGER FIN FIELD EFFECT TRANSISTORS | Jan 14, 2013 | Abandoned |
Array
(
[id] => 10059936
[patent_doc_number] => 09099299
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[patent_issue_date] => 2015-08-04
[patent_title] => 'Hard mask removal method'
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Array
(
[id] => 9792794
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[patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/371550 | Method of manufacturing an image sensor by joining a pixel circuit substrate and a logic circuit substrate and thereafter thinning the pixel circuit substrate | Jan 7, 2013 | Issued |
Array
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[patent_title] => 'Display panel manufacturing method, display panel, and display apparatus'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/733958 | Display panel manufacturing method, display panel, and display apparatus | Jan 3, 2013 | Issued |
Array
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[patent_issue_date] => 2015-01-01
[patent_title] => 'SILICON SOLAR CELL MODULE USING CONDUCTIVE NPASTE AS ELECTRODE AND METHOD FOR MANUFACTURING SAME'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/371377 | Silicon solar cell module using conductive npaste as electrode and method for manufacturing same | Dec 27, 2012 | Issued |
Array
(
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[patent_title] => 'Thin film capping'
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/878046 | Method for manufacturing N-type MOSFET | Dec 6, 2012 | Issued |
Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/674965 | Method for manufacturing semiconductor layout pattern, method for manufacturing semiconductor device, and semiconductor device | Nov 12, 2012 | Issued |