Search

D Margaret M Seaman

Examiner (ID: 14094, Phone: (571)272-0694 , Office: P/1625 )

Most Active Art Unit
1625
Art Unit(s)
1621, 1203, 1625, 1612
Total Applications
2966
Issued Applications
2173
Pending Applications
266
Abandoned Applications
526

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10501470 [patent_doc_number] => 09229870 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-01-05 [patent_title] => 'Managing cache systems of storage systems' [patent_app_type] => utility [patent_app_number] => 13/929490 [patent_app_country] => US [patent_app_date] => 2013-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7582 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13929490 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/929490
Managing cache systems of storage systems Jun 26, 2013 Issued
Array ( [id] => 10157640 [patent_doc_number] => 09189420 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-17 [patent_title] => 'Wear-leveling method, storage device, and information system' [patent_app_type] => utility [patent_app_number] => 13/903774 [patent_app_country] => US [patent_app_date] => 2013-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6205 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 316 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13903774 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/903774
Wear-leveling method, storage device, and information system May 27, 2013 Issued
Array ( [id] => 9302117 [patent_doc_number] => 08650360 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-11 [patent_title] => 'Storage system' [patent_app_type] => utility [patent_app_number] => 13/897672 [patent_app_country] => US [patent_app_date] => 2013-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 15654 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13897672 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/897672
Storage system May 19, 2013 Issued
Array ( [id] => 9500010 [patent_doc_number] => 08738850 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-27 [patent_title] => 'Flash-aware storage optimized for mobile and embedded DBMS on NAND flash memory' [patent_app_type] => utility [patent_app_number] => 13/873229 [patent_app_country] => US [patent_app_date] => 2013-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 5251 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13873229 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/873229
Flash-aware storage optimized for mobile and embedded DBMS on NAND flash memory Apr 29, 2013 Issued
Array ( [id] => 11258500 [patent_doc_number] => 09483401 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-01 [patent_title] => 'Data processing method and apparatus' [patent_app_type] => utility [patent_app_number] => 13/871335 [patent_app_country] => US [patent_app_date] => 2013-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3173 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13871335 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/871335
Data processing method and apparatus Apr 25, 2013 Issued
Array ( [id] => 11226752 [patent_doc_number] => 09454475 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-27 [patent_title] => 'Control device, storage device, and data writing method' [patent_app_type] => utility [patent_app_number] => 13/870722 [patent_app_country] => US [patent_app_date] => 2013-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 23 [patent_no_of_words] => 11684 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13870722 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/870722
Control device, storage device, and data writing method Apr 24, 2013 Issued
Array ( [id] => 9006097 [patent_doc_number] => 20130227222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-29 [patent_title] => 'MULTI-CORE ACTIVE MEMORY PROCESSOR SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/862800 [patent_app_country] => US [patent_app_date] => 2013-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3796 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13862800 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/862800
Multi-core active memory processor system Apr 14, 2013 Issued
Array ( [id] => 10092114 [patent_doc_number] => 09128940 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-09-08 [patent_title] => 'Method and apparatus for performing file-level restoration from a block-based backup file stored on a sequential storage device' [patent_app_type] => utility [patent_app_number] => 13/775940 [patent_app_country] => US [patent_app_date] => 2013-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8236 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13775940 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/775940
Method and apparatus for performing file-level restoration from a block-based backup file stored on a sequential storage device Feb 24, 2013 Issued
Array ( [id] => 9926257 [patent_doc_number] => 08984243 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-03-17 [patent_title] => 'Managing operational parameters for electronic resources' [patent_app_type] => utility [patent_app_number] => 13/775001 [patent_app_country] => US [patent_app_date] => 2013-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 16374 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13775001 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/775001
Managing operational parameters for electronic resources Feb 21, 2013 Issued
Array ( [id] => 9974191 [patent_doc_number] => 09021228 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-28 [patent_title] => 'Managing out-of-order memory command execution from multiple queues while maintaining data coherency' [patent_app_type] => utility [patent_app_number] => 13/757397 [patent_app_country] => US [patent_app_date] => 2013-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 14737 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13757397 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/757397
Managing out-of-order memory command execution from multiple queues while maintaining data coherency Jan 31, 2013 Issued
Array ( [id] => 8965488 [patent_doc_number] => 20130205090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-08 [patent_title] => 'MULTI-CORE PROCESSOR HAVING HIERARCHICAL COMMUNICATION ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 13/757216 [patent_app_country] => US [patent_app_date] => 2013-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3211 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13757216 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/757216
MULTI-CORE PROCESSOR HAVING HIERARCHICAL COMMUNICATION ARCHITECTURE Jan 31, 2013 Abandoned
Array ( [id] => 9644977 [patent_doc_number] => 20140223090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-07 [patent_title] => 'ACCESSING CONTROL REGISTERS OVER A DATA BUS' [patent_app_type] => utility [patent_app_number] => 13/757498 [patent_app_country] => US [patent_app_date] => 2013-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5987 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13757498 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/757498
Accessing control registers over a data bus Jan 31, 2013 Issued
Array ( [id] => 8823870 [patent_doc_number] => 20130124915 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-16 [patent_title] => 'REMOTE COPY SYSTEM AND METHOD' [patent_app_type] => utility [patent_app_number] => 13/733224 [patent_app_country] => US [patent_app_date] => 2013-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 15413 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13733224 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/733224
Remote copy system and method Jan 2, 2013 Issued
Array ( [id] => 9150473 [patent_doc_number] => 20130304996 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-14 [patent_title] => 'METHOD AND SYSTEM FOR RUN TIME DETECTION OF SHARED MEMORY DATA ACCESS HAZARDS' [patent_app_type] => utility [patent_app_number] => 13/728990 [patent_app_country] => US [patent_app_date] => 2012-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10192 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13728990 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/728990
METHOD AND SYSTEM FOR RUN TIME DETECTION OF SHARED MEMORY DATA ACCESS HAZARDS Dec 26, 2012 Abandoned
Array ( [id] => 8794174 [patent_doc_number] => 20130111143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-02 [patent_title] => 'MULTI-CORE SYSTEM AND EXTERNAL INPUT/OUTPUT BUS CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 13/718292 [patent_app_country] => US [patent_app_date] => 2012-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5207 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13718292 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/718292
Multi-core system and external input/output bus control method Dec 17, 2012 Issued
Array ( [id] => 9947493 [patent_doc_number] => 08996820 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-31 [patent_title] => 'Multi-core processor system, cache coherency control method, and computer product' [patent_app_type] => utility [patent_app_number] => 13/712816 [patent_app_country] => US [patent_app_date] => 2012-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9850 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13712816 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/712816
Multi-core processor system, cache coherency control method, and computer product Dec 11, 2012 Issued
Array ( [id] => 8608259 [patent_doc_number] => 20130013571 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-10 [patent_title] => 'MANAGEMENT OF OBJECT MAPPING INFORMATION CORRESPONDING TO A DISTRIBUTED STORAGE SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/620708 [patent_app_country] => US [patent_app_date] => 2012-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10528 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13620708 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/620708
Management of object mapping information corresponding to a distributed storage system Sep 14, 2012 Issued
Array ( [id] => 9062767 [patent_doc_number] => 08549220 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-01 [patent_title] => 'Management of write cache using stride objects' [patent_app_type] => utility [patent_app_number] => 13/616029 [patent_app_country] => US [patent_app_date] => 2012-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4565 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13616029 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/616029
Management of write cache using stride objects Sep 13, 2012 Issued
Array ( [id] => 10867090 [patent_doc_number] => 08892815 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-18 [patent_title] => 'Optimized fragmented block compaction with a bitmap' [patent_app_type] => utility [patent_app_number] => 13/614211 [patent_app_country] => US [patent_app_date] => 2012-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 5683 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13614211 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/614211
Optimized fragmented block compaction with a bitmap Sep 12, 2012 Issued
Array ( [id] => 8893669 [patent_doc_number] => 20130166853 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-27 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/614238 [patent_app_country] => US [patent_app_date] => 2012-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5834 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13614238 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/614238
SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF Sep 12, 2012 Abandoned
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