D Margaret M Seaman
Examiner (ID: 9100, Phone: (571)272-0694 , Office: P/1625 )
Most Active Art Unit | 1625 |
Art Unit(s) | 1612, 1621, 1625, 1203 |
Total Applications | 3010 |
Issued Applications | 2200 |
Pending Applications | 275 |
Abandoned Applications | 535 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 4865337
[patent_doc_number] => 20080144396
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[patent_kind] => A1
[patent_issue_date] => 2008-06-19
[patent_title] => 'ERASING FLASH MEMORY USING ADAPTIVE DRAIN AND/OR GATE BIAS'
[patent_app_type] => utility
[patent_app_number] => 11/612863
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/612863 | Erasing flash memory using adaptive drain and/or gate bias | Dec 18, 2006 | Issued |
Array
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[patent_doc_number] => 20080144375
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[patent_kind] => A1
[patent_issue_date] => 2008-06-19
[patent_title] => 'FLASH MEMORY DEVICE WITH SHUNT'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/613175 | Flash memory device with shunt | Dec 18, 2006 | Issued |
Array
(
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[patent_title] => 'Memory card module'
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Array
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[patent_issue_date] => 2010-01-26
[patent_title] => 'Memory module and register with minimized routing path'
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Array
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[patent_title] => 'System and method for providing high endurance low cost CMOS compatible EEPROM devices'
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Array
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[patent_title] => 'Semiconductor memory device for reducing cell area'
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/552893 | Memory device with configurable delay tracking | Oct 24, 2006 | Issued |
Array
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[id] => 218134
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[patent_title] => 'Efficient circuit and method to measure resistance thresholds'
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Array
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Array
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[id] => 286546
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Array
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Array
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Array
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Array
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Array
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Array
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Array
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