Search

D Margaret M Seaman

Examiner (ID: 14094, Phone: (571)272-0694 , Office: P/1625 )

Most Active Art Unit
1625
Art Unit(s)
1621, 1203, 1625, 1612
Total Applications
2966
Issued Applications
2173
Pending Applications
266
Abandoned Applications
526

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6052122 [patent_doc_number] => 20110208899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'MEMORY WRITING SYSTEM AND METHOD' [patent_app_type] => utility [patent_app_number] => 13/024561 [patent_app_country] => US [patent_app_date] => 2011-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5077 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0208/20110208899.pdf [firstpage_image] =>[orig_patent_app_number] => 13024561 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/024561
MEMORY WRITING SYSTEM AND METHOD Feb 9, 2011 Abandoned
Array ( [id] => 7653115 [patent_doc_number] => 20110302384 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-08 [patent_title] => 'COMPUTER READABLE MEDIUM STORING INFORMATION PROCESSING PROGRAM, INFORMATION PROCESSING APPARATUS, AND INFORMATION PROCESSING METHOD' [patent_app_type] => utility [patent_app_number] => 13/024110 [patent_app_country] => US [patent_app_date] => 2011-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8828 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0302/20110302384.pdf [firstpage_image] =>[orig_patent_app_number] => 13024110 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/024110
Computer readable medium storing information processing program, information processing apparatus, and information processing method Feb 8, 2011 Issued
Array ( [id] => 9062762 [patent_doc_number] => 08549214 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-01 [patent_title] => 'Protection against data corruption for multi-level memory cell (MLC) flash memory' [patent_app_type] => utility [patent_app_number] => 13/023905 [patent_app_country] => US [patent_app_date] => 2011-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2977 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13023905 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/023905
Protection against data corruption for multi-level memory cell (MLC) flash memory Feb 8, 2011 Issued
Array ( [id] => 7512656 [patent_doc_number] => 20110258366 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-20 [patent_title] => 'STATUS INDICATION IN A SYSTEM HAVING A PLURALITY OF MEMORY DEVICES' [patent_app_type] => utility [patent_app_number] => 13/023838 [patent_app_country] => US [patent_app_date] => 2011-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 8365 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20110258366.pdf [firstpage_image] =>[orig_patent_app_number] => 13023838 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/023838
STATUS INDICATION IN A SYSTEM HAVING A PLURALITY OF MEMORY DEVICES Feb 8, 2011 Abandoned
Array ( [id] => 10164278 [patent_doc_number] => 09195500 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-11-24 [patent_title] => 'Methods for seamless storage importing and devices thereof' [patent_app_type] => utility [patent_app_number] => 13/024147 [patent_app_country] => US [patent_app_date] => 2011-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5162 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13024147 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/024147
Methods for seamless storage importing and devices thereof Feb 8, 2011 Issued
Array ( [id] => 9077399 [patent_doc_number] => 08554991 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-08 [patent_title] => 'High speed interface for dynamic random access memory (DRAM)' [patent_app_type] => utility [patent_app_number] => 13/023991 [patent_app_country] => US [patent_app_date] => 2011-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1867 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13023991 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/023991
High speed interface for dynamic random access memory (DRAM) Feb 8, 2011 Issued
Array ( [id] => 8176574 [patent_doc_number] => 20120110297 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-03 [patent_title] => 'SECURE PARTITIONING WITH SHARED INPUT/OUTPUT' [patent_app_type] => utility [patent_app_number] => 12/955138 [patent_app_country] => US [patent_app_date] => 2010-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4719 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20120110297.pdf [firstpage_image] =>[orig_patent_app_number] => 12955138 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/955138
SECURE PARTITIONING WITH SHARED INPUT/OUTPUT Nov 28, 2010 Abandoned
Array ( [id] => 8222871 [patent_doc_number] => 20120137076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-31 [patent_title] => 'Control of entry of program instructions to a fetch stage within a processing pipepline' [patent_app_type] => utility [patent_app_number] => 12/926600 [patent_app_country] => US [patent_app_date] => 2010-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5509 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12926600 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/926600
Control of entry of program instructions to a fetch stage within a processing pipepline Nov 28, 2010 Issued
Array ( [id] => 11285542 [patent_doc_number] => 09501397 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-22 [patent_title] => 'Data writing method, memory controller, and memory storage apparatus' [patent_app_type] => utility [patent_app_number] => 12/954681 [patent_app_country] => US [patent_app_date] => 2010-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 8675 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12954681 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/954681
Data writing method, memory controller, and memory storage apparatus Nov 25, 2010 Issued
Array ( [id] => 9378842 [patent_doc_number] => 08683124 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-25 [patent_title] => 'Device, control method thereof, and program' [patent_app_type] => utility [patent_app_number] => 12/954144 [patent_app_country] => US [patent_app_date] => 2010-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7790 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12954144 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/954144
Device, control method thereof, and program Nov 23, 2010 Issued
Array ( [id] => 8958984 [patent_doc_number] => 08504778 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-06 [patent_title] => 'Multi-core active memory processor system' [patent_app_type] => utility [patent_app_number] => 12/953710 [patent_app_country] => US [patent_app_date] => 2010-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 3602 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12953710 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/953710
Multi-core active memory processor system Nov 23, 2010 Issued
Array ( [id] => 8935565 [patent_doc_number] => 08495282 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-23 [patent_title] => 'Flash-aware storage optimized for mobile and embedded DBMS on NAND flash memory' [patent_app_type] => utility [patent_app_number] => 12/945106 [patent_app_country] => US [patent_app_date] => 2010-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 5220 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 440 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12945106 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/945106
Flash-aware storage optimized for mobile and embedded DBMS on NAND flash memory Nov 11, 2010 Issued
Array ( [id] => 5948536 [patent_doc_number] => 20110107055 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-05 [patent_title] => 'Diagonally accessed memory array circuit' [patent_app_type] => utility [patent_app_number] => 12/925934 [patent_app_country] => US [patent_app_date] => 2010-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4532 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20110107055.pdf [firstpage_image] =>[orig_patent_app_number] => 12925934 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/925934
Diagonally accessed memory array circuit Nov 1, 2010 Issued
Array ( [id] => 10046583 [patent_doc_number] => 09086981 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-07-21 [patent_title] => 'Exporting guest spatial locality to hypervisors' [patent_app_type] => utility [patent_app_number] => 12/938107 [patent_app_country] => US [patent_app_date] => 2010-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 8785 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12938107 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/938107
Exporting guest spatial locality to hypervisors Nov 1, 2010 Issued
Array ( [id] => 9378871 [patent_doc_number] => 08683153 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-03-25 [patent_title] => 'Iterating for deduplication' [patent_app_type] => utility [patent_app_number] => 12/893854 [patent_app_country] => US [patent_app_date] => 2010-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5831 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12893854 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/893854
Iterating for deduplication Sep 28, 2010 Issued
Array ( [id] => 9289280 [patent_doc_number] => 08645636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-04 [patent_title] => 'Methods for managing ownership of redundant data and systems thereof' [patent_app_type] => utility [patent_app_number] => 12/893968 [patent_app_country] => US [patent_app_date] => 2010-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 17632 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12893968 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/893968
Methods for managing ownership of redundant data and systems thereof Sep 28, 2010 Issued
Array ( [id] => 8058913 [patent_doc_number] => 20120079192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-29 [patent_title] => 'METHODS FOR MANAGING OWNERSHIP OF REDUNDANT DATA AND SYSTEMS THEREOF' [patent_app_type] => utility [patent_app_number] => 12/894022 [patent_app_country] => US [patent_app_date] => 2010-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 18205 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20120079192.pdf [firstpage_image] =>[orig_patent_app_number] => 12894022 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/894022
Methods for managing ownership of redundant data and systems thereof Sep 28, 2010 Issued
Array ( [id] => 8058921 [patent_doc_number] => 20120079199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-29 [patent_title] => 'INTELLIGENT WRITE CACHING FOR SEQUENTIAL TRACKS' [patent_app_type] => utility [patent_app_number] => 12/894017 [patent_app_country] => US [patent_app_date] => 2010-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4378 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20120079199.pdf [firstpage_image] =>[orig_patent_app_number] => 12894017 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/894017
Intelligent write caching for sequential tracks Sep 28, 2010 Issued
Array ( [id] => 8058901 [patent_doc_number] => 20120079187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-29 [patent_title] => 'MANAGEMENT OF WRITE CACHE USING STRIDE OBJECTS' [patent_app_type] => utility [patent_app_number] => 12/894019 [patent_app_country] => US [patent_app_date] => 2010-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4514 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20120079187.pdf [firstpage_image] =>[orig_patent_app_number] => 12894019 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/894019
Management of write cache using stride objects Sep 28, 2010 Issued
Array ( [id] => 8058965 [patent_doc_number] => 20120079223 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-29 [patent_title] => 'METHODS FOR MANAGING OWNERSHIP OF REDUNDANT DATA AND SYSTEMS THEREOF' [patent_app_type] => utility [patent_app_number] => 12/894008 [patent_app_country] => US [patent_app_date] => 2010-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 16893 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20120079223.pdf [firstpage_image] =>[orig_patent_app_number] => 12894008 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/894008
Methods for managing ownership of redundant data and systems thereof Sep 28, 2010 Issued
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