D Margaret M Seaman
Examiner (ID: 9100, Phone: (571)272-0694 , Office: P/1625 )
Most Active Art Unit | 1625 |
Art Unit(s) | 1612, 1621, 1625, 1203 |
Total Applications | 3010 |
Issued Applications | 2200 |
Pending Applications | 275 |
Abandoned Applications | 535 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 475585
[patent_doc_number] => 07230876
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-06-12
[patent_title] => 'Register read for volatile memory'
[patent_app_type] => utility
[patent_app_number] => 11/128829
[patent_app_country] => US
[patent_app_date] => 2005-05-13
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/128829 | Register read for volatile memory | May 12, 2005 | Issued |
Array
(
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[patent_doc_number] => 07280413
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[patent_kind] => B2
[patent_issue_date] => 2007-10-09
[patent_title] => 'Nonvolatile semiconductor memory'
[patent_app_type] => utility
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[pdf_file] => patents/07/280/07280413.pdf
[firstpage_image] =>[orig_patent_app_number] => 11124253
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/124253 | Nonvolatile semiconductor memory | May 8, 2005 | Issued |
Array
(
[id] => 5833416
[patent_doc_number] => 20060245246
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[patent_kind] => A1
[patent_issue_date] => 2006-11-02
[patent_title] => 'Inversion bit line, charge trapping non-volatile memory and method of operating same'
[patent_app_type] => utility
[patent_app_number] => 11/118839
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[patent_app_date] => 2005-04-29
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/118839 | Inversion bit line, charge trapping non-volatile memory and method of operating same | Apr 28, 2005 | Issued |
Array
(
[id] => 569105
[patent_doc_number] => 07161860
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[patent_kind] => B2
[patent_issue_date] => 2007-01-09
[patent_title] => 'Local input/output line precharge circuit of semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 11/115373
[patent_app_country] => US
[patent_app_date] => 2005-04-27
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/115373 | Local input/output line precharge circuit of semiconductor memory device | Apr 26, 2005 | Issued |
Array
(
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[patent_doc_number] => 20060239107
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[patent_issue_date] => 2006-10-26
[patent_title] => 'Memory system and memory device having a serial interface'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/114807 | Memory system and memory device having a serial interface | Apr 25, 2005 | Issued |
Array
(
[id] => 603486
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[patent_issue_date] => 2008-10-07
[patent_title] => 'Information carrier, and system for positioning such an information carrier in a reading and/or writing apparatus'
[patent_app_type] => utility
[patent_app_number] => 11/568243
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Array
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[patent_title] => 'Information carrier, and system for positioning such an information carrier in an apparatus'
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[patent_app_number] => 11/568241
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[patent_app_date] => 2005-04-21
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/568241 | Information carrier, and system for positioning such an information carrier in an apparatus | Apr 20, 2005 | Issued |
Array
(
[id] => 4838540
[patent_doc_number] => 20080279025
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[patent_issue_date] => 2008-11-13
[patent_title] => 'Electronic Circuit with Memory for Which a Threshold Level is Selected'
[patent_app_type] => utility
[patent_app_number] => 11/568003
[patent_app_country] => US
[patent_app_date] => 2005-04-21
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/568003 | Electronic Circuit with Memory for Which a Threshold Level is Selected | Apr 20, 2005 | Abandoned |
Array
(
[id] => 6911114
[patent_doc_number] => 20050174872
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[patent_title] => 'Line drivers that fits within a specified line pitch'
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[firstpage_image] =>[orig_patent_app_number] => 11024279
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/024279 | Line drivers that fits within a specified line pitch | Apr 13, 2005 | Issued |
Array
(
[id] => 902511
[patent_doc_number] => 07339810
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-03-04
[patent_title] => 'Device and method for ensuring current consumption in search engine system'
[patent_app_type] => utility
[patent_app_number] => 11/089837
[patent_app_country] => US
[patent_app_date] => 2005-03-24
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/089837 | Device and method for ensuring current consumption in search engine system | Mar 23, 2005 | Issued |
Array
(
[id] => 426307
[patent_doc_number] => 07272067
[patent_country] => US
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[patent_issue_date] => 2007-09-18
[patent_title] => 'Electrically-programmable integrated circuit antifuses'
[patent_app_type] => utility
[patent_app_number] => 11/060925
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[firstpage_image] =>[orig_patent_app_number] => 11060925
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/060925 | Electrically-programmable integrated circuit antifuses | Feb 17, 2005 | Issued |
Array
(
[id] => 528165
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[patent_title] => 'Circuit and method for reading an antifuse'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/054645 | Circuit and method for reading an antifuse | Feb 7, 2005 | Issued |
Array
(
[id] => 5864345
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[patent_title] => 'Static random access memory and pseudo-static noise margin measuring method'
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Array
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Array
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[patent_title] => 'Static random access memory device having a memory cell with multiple bit-elements'
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Array
(
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[patent_title] => 'Semiconductor memory device for reducing cell area'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/017683 | Semiconductor memory device for reducing cell area | Dec 21, 2004 | Issued |
Array
(
[id] => 718901
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[patent_title] => 'Multi level flash memory device and program method'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/021181 | Multi level flash memory device and program method | Dec 21, 2004 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/018313 | Memory access using multiple activated memory cell rows | Dec 20, 2004 | Issued |
Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/019881 | Method, apparatus, and system for active refresh management | Dec 20, 2004 | Issued |