Search

D Margaret M Seaman

Examiner (ID: 14094, Phone: (571)272-0694 , Office: P/1625 )

Most Active Art Unit
1625
Art Unit(s)
1621, 1203, 1625, 1612
Total Applications
2966
Issued Applications
2173
Pending Applications
266
Abandoned Applications
526

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9116116 [patent_doc_number] => 08572308 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-29 [patent_title] => 'Supporting variable sector sizes in flash storage devices' [patent_app_type] => utility [patent_app_number] => 12/492103 [patent_app_country] => US [patent_app_date] => 2009-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4598 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12492103 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/492103
Supporting variable sector sizes in flash storage devices Jun 24, 2009 Issued
Array ( [id] => 8438159 [patent_doc_number] => 08285943 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-09 [patent_title] => 'Storage control apparatus and method of controlling storage control apparatus' [patent_app_type] => utility [patent_app_number] => 12/526409 [patent_app_country] => US [patent_app_date] => 2009-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 16652 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 357 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12526409 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/526409
Storage control apparatus and method of controlling storage control apparatus Jun 17, 2009 Issued
61/632416 APPLICATION-TRANSPARENT HYBRIDIZED CACHING FOR HIGH-PERFORMANCE STORAGE Jun 14, 2009 Pending
Array ( [id] => 8213873 [patent_doc_number] => 20120131301 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-24 [patent_title] => 'ACCESS APPARATUS AND AVAILABLE STORAGE SPACE CALCULATION METHOD' [patent_app_type] => utility [patent_app_number] => 12/672373 [patent_app_country] => US [patent_app_date] => 2009-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 13929 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20120131301.pdf [firstpage_image] =>[orig_patent_app_number] => 12672373 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/672373
Access apparatus and available storage space calculation method Jun 4, 2009 Issued
Array ( [id] => 9248407 [patent_doc_number] => 08612708 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-17 [patent_title] => 'Hardware data protection device' [patent_app_type] => utility [patent_app_number] => 12/737010 [patent_app_country] => US [patent_app_date] => 2009-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3768 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12737010 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/737010
Hardware data protection device May 28, 2009 Issued
Array ( [id] => 5528823 [patent_doc_number] => 20090198900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-06 [patent_title] => 'Microprocessor Having a Power-Saving Instruction Cache Way Predictor and Instruction Replacement Scheme' [patent_app_type] => utility [patent_app_number] => 12/421268 [patent_app_country] => US [patent_app_date] => 2009-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6081 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20090198900.pdf [firstpage_image] =>[orig_patent_app_number] => 12421268 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/421268
Microprocessor having a power-saving instruction cache way predictor and instruction replacement scheme Apr 8, 2009 Issued
Array ( [id] => 4592797 [patent_doc_number] => 07853773 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-12-14 [patent_title] => 'Program memory space expansion for particular processor instructions' [patent_app_type] => utility [patent_app_number] => 12/383593 [patent_app_country] => US [patent_app_date] => 2009-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6383 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/853/07853773.pdf [firstpage_image] =>[orig_patent_app_number] => 12383593 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/383593
Program memory space expansion for particular processor instructions Mar 23, 2009 Issued
Array ( [id] => 5467405 [patent_doc_number] => 20090327605 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-31 [patent_title] => 'DISK ARRAY APPARATUS, CONTROLLER AND CONTROLLING METHOD THEREFOR, AND RECORDING MEDIUM IN WHICH CONTROLLING PROGRAM IS STORED' [patent_app_type] => utility [patent_app_number] => 12/406287 [patent_app_country] => US [patent_app_date] => 2009-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8923 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0327/20090327605.pdf [firstpage_image] =>[orig_patent_app_number] => 12406287 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/406287
DISK ARRAY APPARATUS, CONTROLLER AND CONTROLLING METHOD THEREFOR, AND RECORDING MEDIUM IN WHICH CONTROLLING PROGRAM IS STORED Mar 17, 2009 Abandoned
Array ( [id] => 8158092 [patent_doc_number] => 08171234 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-01 [patent_title] => 'Multi-bank multi-port architecture' [patent_app_type] => utility [patent_app_number] => 12/404955 [patent_app_country] => US [patent_app_date] => 2009-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11235 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/171/08171234.pdf [firstpage_image] =>[orig_patent_app_number] => 12404955 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/404955
Multi-bank multi-port architecture Mar 15, 2009 Issued
Array ( [id] => 6301837 [patent_doc_number] => 20100161913 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-24 [patent_title] => 'PORTABLE ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 12/403774 [patent_app_country] => US [patent_app_date] => 2009-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5428 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20100161913.pdf [firstpage_image] =>[orig_patent_app_number] => 12403774 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/403774
Portable electronic device Mar 12, 2009 Issued
Array ( [id] => 5571348 [patent_doc_number] => 20090254727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-08 [patent_title] => 'Digital Data Reproducing Apparatus and Recording Medium' [patent_app_type] => utility [patent_app_number] => 12/402394 [patent_app_country] => US [patent_app_date] => 2009-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3659 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20090254727.pdf [firstpage_image] =>[orig_patent_app_number] => 12402394 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/402394
Digital data reproducing apparatus and recording medium Mar 10, 2009 Issued
Array ( [id] => 5475799 [patent_doc_number] => 20090248965 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-01 [patent_title] => 'HYBRID FLASH MEMORY DEVICE AND METHOD OF CONTROLLING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/401466 [patent_app_country] => US [patent_app_date] => 2009-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 4782 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0248/20090248965.pdf [firstpage_image] =>[orig_patent_app_number] => 12401466 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/401466
HYBRID FLASH MEMORY DEVICE AND METHOD OF CONTROLLING THE SAME Mar 9, 2009 Abandoned
Array ( [id] => 7553144 [patent_doc_number] => 08065486 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-22 [patent_title] => 'Cache memory control circuit and processor' [patent_app_type] => utility [patent_app_number] => 12/400308 [patent_app_country] => US [patent_app_date] => 2009-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 26 [patent_no_of_words] => 8987 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/065/08065486.pdf [firstpage_image] =>[orig_patent_app_number] => 12400308 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/400308
Cache memory control circuit and processor Mar 8, 2009 Issued
Array ( [id] => 6067408 [patent_doc_number] => 20110202709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-18 [patent_title] => 'OPTIMIZING STORAGE OF COMMON PATTERNS IN FLASH MEMORY' [patent_app_type] => utility [patent_app_number] => 12/922543 [patent_app_country] => US [patent_app_date] => 2009-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3918 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20110202709.pdf [firstpage_image] =>[orig_patent_app_number] => 12922543 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/922543
OPTIMIZING STORAGE OF COMMON PATTERNS IN FLASH MEMORY Mar 3, 2009 Abandoned
Array ( [id] => 9102621 [patent_doc_number] => 08566515 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-22 [patent_title] => 'Memory subsystem' [patent_app_type] => utility [patent_app_number] => 12/380410 [patent_app_country] => US [patent_app_date] => 2009-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 97 [patent_figures_cnt] => 113 [patent_no_of_words] => 30438 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12380410 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/380410
Memory subsystem Feb 25, 2009 Issued
Array ( [id] => 7779821 [patent_doc_number] => 08122205 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-21 [patent_title] => 'Structured virtual registers for embedded controller devices' [patent_app_type] => utility [patent_app_number] => 12/389791 [patent_app_country] => US [patent_app_date] => 2009-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3946 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/122/08122205.pdf [firstpage_image] =>[orig_patent_app_number] => 12389791 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/389791
Structured virtual registers for embedded controller devices Feb 19, 2009 Issued
Array ( [id] => 10144051 [patent_doc_number] => 09176860 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-03 [patent_title] => 'Database join optimized for flash storage' [patent_app_type] => utility [patent_app_number] => 12/370551 [patent_app_country] => US [patent_app_date] => 2009-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 7509 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12370551 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/370551
Database join optimized for flash storage Feb 11, 2009 Issued
Array ( [id] => 6396037 [patent_doc_number] => 20100318760 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-16 [patent_title] => 'MEMORY CONTROLLER, NONVOLATILE STORAGE DEVICE, AND NONVOLATILE STORAGE SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/526372 [patent_app_country] => US [patent_app_date] => 2009-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 7272 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0318/20100318760.pdf [firstpage_image] =>[orig_patent_app_number] => 12526372 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/526372
MEMORY CONTROLLER, NONVOLATILE STORAGE DEVICE, AND NONVOLATILE STORAGE SYSTEM Jan 27, 2009 Abandoned
Array ( [id] => 68895 [patent_doc_number] => 07761673 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-20 [patent_title] => 'Complier assisted victim cache bypassing' [patent_app_type] => utility [patent_app_number] => 12/355019 [patent_app_country] => US [patent_app_date] => 2009-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2533 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 387 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/761/07761673.pdf [firstpage_image] =>[orig_patent_app_number] => 12355019 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/355019
Complier assisted victim cache bypassing Jan 15, 2009 Issued
Array ( [id] => 5587286 [patent_doc_number] => 20090106488 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-23 [patent_title] => 'STATIC RANDOM ACCESS MEMORY (SRAM) COMPATIBLE, HIGH AVAILABILITY MEMORY ARRAY AND METHOD EMPLOYING SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY (DRAM) IN CONJUNCTION WITH A DATA CACHE AND SEPARATE READ AND WRITE REGISTERS AND TAG BLOCKS' [patent_app_type] => utility [patent_app_number] => 12/254702 [patent_app_country] => US [patent_app_date] => 2008-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 13671 [patent_no_of_claims] => 92 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20090106488.pdf [firstpage_image] =>[orig_patent_app_number] => 12254702 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/254702
STATIC RANDOM ACCESS MEMORY (SRAM) COMPATIBLE, HIGH AVAILABILITY MEMORY ARRAY AND METHOD EMPLOYING SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY (DRAM) IN CONJUNCTION WITH A DATA CACHE AND SEPARATE READ AND WRITE REGISTERS AND TAG BLOCKS Oct 19, 2008 Abandoned
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