Search

D Margaret M Seaman

Examiner (ID: 9100, Phone: (571)272-0694 , Office: P/1625 )

Most Active Art Unit
1625
Art Unit(s)
1612, 1621, 1625, 1203
Total Applications
3010
Issued Applications
2200
Pending Applications
275
Abandoned Applications
535

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5636157 [patent_doc_number] => 20060067130 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-30 [patent_title] => 'Nonvolatile memory devices including overlapped data sensing and verification and methods of verifying data in nonvolatile memory devices' [patent_app_type] => utility [patent_app_number] => 11/017335 [patent_app_country] => US [patent_app_date] => 2004-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4031 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20060067130.pdf [firstpage_image] =>[orig_patent_app_number] => 11017335 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/017335
Nonvolatile memory devices including overlapped data sensing and verification and methods of verifying data in nonvolatile memory devices Dec 19, 2004 Issued
Array ( [id] => 5647403 [patent_doc_number] => 20060133135 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-22 [patent_title] => 'Reducing power in SRAMs while maintaining cell stability' [patent_app_type] => utility [patent_app_number] => 11/017981 [patent_app_country] => US [patent_app_date] => 2004-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1918 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20060133135.pdf [firstpage_image] =>[orig_patent_app_number] => 11017981 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/017981
Reducing power in SRAMs while maintaining cell stability Dec 19, 2004 Abandoned
Array ( [id] => 5647453 [patent_doc_number] => 20060133185 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-22 [patent_title] => 'Memory array leakage reduction circuit and method' [patent_app_type] => utility [patent_app_number] => 11/018013 [patent_app_country] => US [patent_app_date] => 2004-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5171 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20060133185.pdf [firstpage_image] =>[orig_patent_app_number] => 11018013 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/018013
Memory array leakage reduction circuit and method Dec 19, 2004 Issued
Array ( [id] => 547650 [patent_doc_number] => 07177207 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-02-13 [patent_title] => 'Sense amplifier timing' [patent_app_type] => utility [patent_app_number] => 11/015369 [patent_app_country] => US [patent_app_date] => 2004-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2900 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/177/07177207.pdf [firstpage_image] =>[orig_patent_app_number] => 11015369 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/015369
Sense amplifier timing Dec 16, 2004 Issued
Array ( [id] => 547843 [patent_doc_number] => 07177221 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-02-13 [patent_title] => 'Initializing memory blocks' [patent_app_type] => utility [patent_app_number] => 11/015265 [patent_app_country] => US [patent_app_date] => 2004-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2683 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/177/07177221.pdf [firstpage_image] =>[orig_patent_app_number] => 11015265 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/015265
Initializing memory blocks Dec 15, 2004 Issued
Array ( [id] => 554565 [patent_doc_number] => 07167407 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-23 [patent_title] => 'Dynamic semiconductor memory device and power saving mode of operation method of the same' [patent_app_type] => utility [patent_app_number] => 11/015391 [patent_app_country] => US [patent_app_date] => 2004-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3316 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/167/07167407.pdf [firstpage_image] =>[orig_patent_app_number] => 11015391 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/015391
Dynamic semiconductor memory device and power saving mode of operation method of the same Dec 15, 2004 Issued
Array ( [id] => 5647402 [patent_doc_number] => 20060133134 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-22 [patent_title] => 'Single-event upset tolerant static random access memory cell' [patent_app_type] => utility [patent_app_number] => 11/014315 [patent_app_country] => US [patent_app_date] => 2004-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1950 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20060133134.pdf [firstpage_image] =>[orig_patent_app_number] => 11014315 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/014315
Single-event upset tolerant static random access memory cell Dec 15, 2004 Abandoned
Array ( [id] => 5792364 [patent_doc_number] => 20060013045 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-19 [patent_title] => 'Page buffer of non-volatile memory device and method of programming and reading non-volatile memory device' [patent_app_type] => utility [patent_app_number] => 11/014507 [patent_app_country] => US [patent_app_date] => 2004-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4578 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20060013045.pdf [firstpage_image] =>[orig_patent_app_number] => 11014507 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/014507
Page buffer of non-volatile memory device and method of programming and reading non-volatile memory device Dec 15, 2004 Issued
Array ( [id] => 7096324 [patent_doc_number] => 20050128782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-16 [patent_title] => 'Ferroelectric memory device having a reference voltage generating circuit' [patent_app_type] => utility [patent_app_number] => 11/014117 [patent_app_country] => US [patent_app_date] => 2004-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4584 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20050128782.pdf [firstpage_image] =>[orig_patent_app_number] => 11014117 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/014117
Ferroelectric memory device having a reference voltage generating circuit Dec 14, 2004 Issued
Array ( [id] => 543182 [patent_doc_number] => 07180813 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-20 [patent_title] => 'Programmable system device having a shared power supply voltage generator for FLASH and PLD modules' [patent_app_type] => utility [patent_app_number] => 11/012521 [patent_app_country] => US [patent_app_date] => 2004-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 6303 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/180/07180813.pdf [firstpage_image] =>[orig_patent_app_number] => 11012521 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/012521
Programmable system device having a shared power supply voltage generator for FLASH and PLD modules Dec 14, 2004 Issued
Array ( [id] => 5709249 [patent_doc_number] => 20060050594 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-09 [patent_title] => 'Flash memory device and method of erasing flash memory cell thereof' [patent_app_type] => utility [patent_app_number] => 11/011725 [patent_app_country] => US [patent_app_date] => 2004-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4203 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20060050594.pdf [firstpage_image] =>[orig_patent_app_number] => 11011725 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/011725
Flash memory device and method of erasing flash memory cell thereof Dec 13, 2004 Issued
Array ( [id] => 419719 [patent_doc_number] => 07277346 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-10-02 [patent_title] => 'Method and system for hard failure repairs in the field' [patent_app_type] => utility [patent_app_number] => 11/012877 [patent_app_country] => US [patent_app_date] => 2004-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6287 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 314 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/277/07277346.pdf [firstpage_image] =>[orig_patent_app_number] => 11012877 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/012877
Method and system for hard failure repairs in the field Dec 13, 2004 Issued
Array ( [id] => 5864369 [patent_doc_number] => 20060098499 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-11 [patent_title] => 'Random access memory with stability enhancement and early read elimination' [patent_app_type] => utility [patent_app_number] => 10/985453 [patent_app_country] => US [patent_app_date] => 2004-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2843 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20060098499.pdf [firstpage_image] =>[orig_patent_app_number] => 10985453 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/985453
Random access memory with stability enhancement and early read elimination Nov 9, 2004 Issued
Array ( [id] => 916527 [patent_doc_number] => 07327598 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-05 [patent_title] => 'High performance, low leakage SRAM device and a method of placing a portion of memory cells of an SRAM device in an active mode' [patent_app_type] => utility [patent_app_number] => 10/985629 [patent_app_country] => US [patent_app_date] => 2004-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4729 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/327/07327598.pdf [firstpage_image] =>[orig_patent_app_number] => 10985629 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/985629
High performance, low leakage SRAM device and a method of placing a portion of memory cells of an SRAM device in an active mode Nov 9, 2004 Issued
Array ( [id] => 5864340 [patent_doc_number] => 20060098470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-11 [patent_title] => 'Circuit for generating a centered reference voltage for a 1T/1C ferroelectric memory' [patent_app_type] => utility [patent_app_number] => 10/984065 [patent_app_country] => US [patent_app_date] => 2004-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4136 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20060098470.pdf [firstpage_image] =>[orig_patent_app_number] => 10984065 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/984065
Circuit for generating a centered reference voltage for a 1T/1C ferroelectric memory Nov 8, 2004 Issued
Array ( [id] => 5864390 [patent_doc_number] => 20060098520 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-11 [patent_title] => 'Apparatus and method of word line decoding for deep pipelined memory' [patent_app_type] => utility [patent_app_number] => 10/982109 [patent_app_country] => US [patent_app_date] => 2004-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1909 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20060098520.pdf [firstpage_image] =>[orig_patent_app_number] => 10982109 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/982109
Apparatus and method of word line decoding for deep pipelined memory Nov 4, 2004 Issued
Array ( [id] => 7415472 [patent_doc_number] => 20040264257 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-30 [patent_title] => 'Semiconductor storage device, mobile electronic apparatus, method for controlling erase operation, and method for controlling program operation' [patent_app_type] => new [patent_app_number] => 10/851433 [patent_app_country] => US [patent_app_date] => 2004-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 25482 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0264/20040264257.pdf [firstpage_image] =>[orig_patent_app_number] => 10851433 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/851433
Semiconductor storage device, mobile electronic apparatus, method for controlling erase operation, and method for controlling program operation May 19, 2004 Issued
Array ( [id] => 624931 [patent_doc_number] => 07139202 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-11-21 [patent_title] => 'Semiconductor storage device, mobile electronic apparatus, and method for controlling the semiconductor storage device' [patent_app_type] => utility [patent_app_number] => 10/850806 [patent_app_country] => US [patent_app_date] => 2004-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 20398 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/139/07139202.pdf [firstpage_image] =>[orig_patent_app_number] => 10850806 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/850806
Semiconductor storage device, mobile electronic apparatus, and method for controlling the semiconductor storage device May 19, 2004 Issued
Array ( [id] => 7244132 [patent_doc_number] => 20040257878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-23 [patent_title] => 'Semiconductor storage device and mobile electronic apparatus' [patent_app_type] => new [patent_app_number] => 10/851517 [patent_app_country] => US [patent_app_date] => 2004-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 24821 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0257/20040257878.pdf [firstpage_image] =>[orig_patent_app_number] => 10851517 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/851517
Semiconductor storage device and mobile electronic apparatus May 19, 2004 Issued
Array ( [id] => 7059876 [patent_doc_number] => 20050002236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-06 [patent_title] => 'Semiconductor storage device and mobile electronic apparatus' [patent_app_type] => utility [patent_app_number] => 10/851733 [patent_app_country] => US [patent_app_date] => 2004-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 27166 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20050002236.pdf [firstpage_image] =>[orig_patent_app_number] => 10851733 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/851733
Semiconductor storage device and mobile electronic apparatus May 19, 2004 Issued
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