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Dakota M Talbert

Examiner (ID: 4286)

Most Active Art Unit
2841
Art Unit(s)
2841
Total Applications
46
Issued Applications
8
Pending Applications
36
Abandoned Applications
2

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5319826 [patent_doc_number] => 20090057816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-05 [patent_title] => 'METHOD TO REDUCE RESIDUAL STI CORNER DEFECTS GENERATED DURING SPE IN THE FABRICATION OF NANO-SCALE CMOS TRANSISTORS USING DSB SUBSTRATE AND HOT TECHNOLOGY' [patent_app_type] => utility [patent_app_number] => 11/847053 [patent_app_country] => US [patent_app_date] => 2007-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6951 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20090057816.pdf [firstpage_image] =>[orig_patent_app_number] => 11847053 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/847053
METHOD TO REDUCE RESIDUAL STI CORNER DEFECTS GENERATED DURING SPE IN THE FABRICATION OF NANO-SCALE CMOS TRANSISTORS USING DSB SUBSTRATE AND HOT TECHNOLOGY Aug 28, 2007 Abandoned
Array ( [id] => 9376313 [patent_doc_number] => 08680578 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-25 [patent_title] => 'Field effect transistor with enhanced insulator structure' [patent_app_type] => utility [patent_app_number] => 11/895096 [patent_app_country] => US [patent_app_date] => 2007-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3648 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11895096 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/895096
Field effect transistor with enhanced insulator structure Aug 22, 2007 Issued
Array ( [id] => 4944142 [patent_doc_number] => 20080081467 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-03 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/842615 [patent_app_country] => US [patent_app_date] => 2007-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6676 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20080081467.pdf [firstpage_image] =>[orig_patent_app_number] => 11842615 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/842615
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Aug 20, 2007 Abandoned
Array ( [id] => 4731183 [patent_doc_number] => 20080048240 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-28 [patent_title] => 'Printed Non-Volatile Memory' [patent_app_type] => utility [patent_app_number] => 11/842884 [patent_app_country] => US [patent_app_date] => 2007-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12601 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0048/20080048240.pdf [firstpage_image] =>[orig_patent_app_number] => 11842884 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/842884
Printed non-volatile memory Aug 20, 2007 Issued
Array ( [id] => 4765153 [patent_doc_number] => 20080176364 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-24 [patent_title] => 'METHOD OF MANUFACTURING THIN FILM TRANSISTOR SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 11/841336 [patent_app_country] => US [patent_app_date] => 2007-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7354 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0176/20080176364.pdf [firstpage_image] =>[orig_patent_app_number] => 11841336 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/841336
METHOD OF MANUFACTURING THIN FILM TRANSISTOR SUBSTRATE Aug 19, 2007 Abandoned
Array ( [id] => 4648778 [patent_doc_number] => 20080036033 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-14 [patent_title] => 'One-time programmable memory' [patent_app_type] => utility [patent_app_number] => 11/889174 [patent_app_country] => US [patent_app_date] => 2007-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4054 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20080036033.pdf [firstpage_image] =>[orig_patent_app_number] => 11889174 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/889174
One-time programmable memory Aug 8, 2007 Abandoned
Array ( [id] => 4595789 [patent_doc_number] => 07981741 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-07-19 [patent_title] => 'High-capacitance density thin film dielectrics having columnar grains formed on base-metal foils' [patent_app_type] => utility [patent_app_number] => 11/832995 [patent_app_country] => US [patent_app_date] => 2007-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3404 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/981/07981741.pdf [firstpage_image] =>[orig_patent_app_number] => 11832995 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/832995
High-capacitance density thin film dielectrics having columnar grains formed on base-metal foils Aug 1, 2007 Issued
Array ( [id] => 4944071 [patent_doc_number] => 20080081396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-03 [patent_title] => 'Method of fabricating image sensor having inner lens' [patent_app_type] => utility [patent_app_number] => 11/882155 [patent_app_country] => US [patent_app_date] => 2007-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4815 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20080081396.pdf [firstpage_image] =>[orig_patent_app_number] => 11882155 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/882155
Method of fabricating image sensor having inner lens Jul 30, 2007 Issued
Array ( [id] => 4909810 [patent_doc_number] => 20080020576 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-24 [patent_title] => 'METHOD OF FORMING POLYSILICON PATTERN' [patent_app_type] => utility [patent_app_number] => 11/782196 [patent_app_country] => US [patent_app_date] => 2007-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1319 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20080020576.pdf [firstpage_image] =>[orig_patent_app_number] => 11782196 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/782196
METHOD OF FORMING POLYSILICON PATTERN Jul 23, 2007 Abandoned
Array ( [id] => 4797557 [patent_doc_number] => 20080009143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-10 [patent_title] => 'Method of forming silicon oxide layer' [patent_app_type] => utility [patent_app_number] => 11/819275 [patent_app_country] => US [patent_app_date] => 2007-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4223 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20080009143.pdf [firstpage_image] =>[orig_patent_app_number] => 11819275 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/819275
Method of forming silicon oxide layer Jun 25, 2007 Abandoned
Array ( [id] => 4833473 [patent_doc_number] => 20080132020 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-05 [patent_title] => 'Method of forming silicon nano crystals and method of manufacturing memory devices having the same' [patent_app_type] => utility [patent_app_number] => 11/812275 [patent_app_country] => US [patent_app_date] => 2007-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2770 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20080132020.pdf [firstpage_image] =>[orig_patent_app_number] => 11812275 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/812275
Method of forming silicon nano crystals and method of manufacturing memory devices having the same Jun 17, 2007 Abandoned
Array ( [id] => 5163100 [patent_doc_number] => 20070284681 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-13 [patent_title] => 'APPARATUS AND METHOD FOR PROTECTIVE COVERING OF MICROELECTROMECHANICAL SYSTEM (MEMS) DEVICES' [patent_app_type] => utility [patent_app_number] => 11/761946 [patent_app_country] => US [patent_app_date] => 2007-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7814 [patent_no_of_claims] => 63 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0284/20070284681.pdf [firstpage_image] =>[orig_patent_app_number] => 11761946 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/761946
APPARATUS AND METHOD FOR PROTECTIVE COVERING OF MICROELECTROMECHANICAL SYSTEM (MEMS) DEVICES Jun 11, 2007 Abandoned
Array ( [id] => 5085455 [patent_doc_number] => 20070275506 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-29 [patent_title] => 'Semiconductor device and a method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/798095 [patent_app_country] => US [patent_app_date] => 2007-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 14564 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0275/20070275506.pdf [firstpage_image] =>[orig_patent_app_number] => 11798095 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/798095
Separation method of semiconductor device May 9, 2007 Issued
Array ( [id] => 4663698 [patent_doc_number] => 20080254605 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-16 [patent_title] => 'METHOD OF REDUCING THE INTERFACIAL OXIDE THICKNESS' [patent_app_type] => utility [patent_app_number] => 11/735926 [patent_app_country] => US [patent_app_date] => 2007-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6792 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20080254605.pdf [firstpage_image] =>[orig_patent_app_number] => 11735926 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/735926
METHOD OF REDUCING THE INTERFACIAL OXIDE THICKNESS Apr 15, 2007 Abandoned
Array ( [id] => 5247467 [patent_doc_number] => 20070243701 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-18 [patent_title] => 'Semiconductor device fabrication method using ultra-rapid thermal annealing' [patent_app_type] => utility [patent_app_number] => 11/783035 [patent_app_country] => US [patent_app_date] => 2007-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5114 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0243/20070243701.pdf [firstpage_image] =>[orig_patent_app_number] => 11783035 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/783035
Semiconductor device fabrication method using ultra-rapid thermal annealing Apr 4, 2007 Abandoned
Array ( [id] => 4682416 [patent_doc_number] => 20080248642 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-09 [patent_title] => 'Nanowire transistor and method for forming same' [patent_app_type] => utility [patent_app_number] => 11/732675 [patent_app_country] => US [patent_app_date] => 2007-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2598 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0248/20080248642.pdf [firstpage_image] =>[orig_patent_app_number] => 11732675 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/732675
Nanowire transistor and method for forming same Apr 3, 2007 Issued
Array ( [id] => 122721 [patent_doc_number] => 07704858 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-27 [patent_title] => 'Methods of forming nickel silicide layers with low carbon content' [patent_app_type] => utility [patent_app_number] => 11/731275 [patent_app_country] => US [patent_app_date] => 2007-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3991 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/704/07704858.pdf [firstpage_image] =>[orig_patent_app_number] => 11731275 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/731275
Methods of forming nickel silicide layers with low carbon content Mar 28, 2007 Issued
Array ( [id] => 4816973 [patent_doc_number] => 20080224232 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-18 [patent_title] => 'SILICIDATION PROCESS FOR MOS TRANSISTOR AND TRANSISTOR STRUCTURE' [patent_app_type] => utility [patent_app_number] => 11/687185 [patent_app_country] => US [patent_app_date] => 2007-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2719 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20080224232.pdf [firstpage_image] =>[orig_patent_app_number] => 11687185 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/687185
SILICIDATION PROCESS FOR MOS TRANSISTOR AND TRANSISTOR STRUCTURE Mar 15, 2007 Abandoned
Array ( [id] => 4695530 [patent_doc_number] => 20080217714 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-11 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING TILES FOR DUAL-TRENCH INTEGRATION AND METHOD THEREFOR' [patent_app_type] => utility [patent_app_number] => 11/683236 [patent_app_country] => US [patent_app_date] => 2007-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4912 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0217/20080217714.pdf [firstpage_image] =>[orig_patent_app_number] => 11683236 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/683236
Semiconductor device having tiles for dual-trench integration and method therefor Mar 6, 2007 Issued
Array ( [id] => 5129068 [patent_doc_number] => 20070205465 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-06 [patent_title] => 'Semiconductor device and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 11/706335 [patent_app_country] => US [patent_app_date] => 2007-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10482 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20070205465.pdf [firstpage_image] =>[orig_patent_app_number] => 11706335 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/706335
Semiconductor device and fabrication method thereof Feb 14, 2007 Abandoned
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