Dakota M Talbert
Examiner (ID: 4286)
Most Active Art Unit | 2841 |
Art Unit(s) | 2841 |
Total Applications | 46 |
Issued Applications | 8 |
Pending Applications | 36 |
Abandoned Applications | 2 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 7170436
[patent_doc_number] => 20050202611
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-09-15
[patent_title] => 'Method of laser irradiation'
[patent_app_type] => utility
[patent_app_number] => 11/054555
[patent_app_country] => US
[patent_app_date] => 2005-02-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5949
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0202/20050202611.pdf
[firstpage_image] =>[orig_patent_app_number] => 11054555
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/054555 | Method of laser irradiation | Feb 9, 2005 | Abandoned |
Array
(
[id] => 247040
[patent_doc_number] => 07585792
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-09-08
[patent_title] => 'Relaxation of a strained layer using a molten layer'
[patent_app_type] => utility
[patent_app_number] => 11/052885
[patent_app_country] => US
[patent_app_date] => 2005-02-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 4356
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/585/07585792.pdf
[firstpage_image] =>[orig_patent_app_number] => 11052885
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/052885 | Relaxation of a strained layer using a molten layer | Feb 8, 2005 | Issued |
Array
(
[id] => 5670310
[patent_doc_number] => 20060175664
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-08-10
[patent_title] => 'Semiconductor constructions, and methods of forming metal silicides'
[patent_app_type] => utility
[patent_app_number] => 11/053475
[patent_app_country] => US
[patent_app_date] => 2005-02-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4420
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0175/20060175664.pdf
[firstpage_image] =>[orig_patent_app_number] => 11053475
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/053475 | Semiconductor constructions, and methods of forming metal silicides | Feb 6, 2005 | Abandoned |
Array
(
[id] => 7069619
[patent_doc_number] => 20050245004
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-11-03
[patent_title] => 'Method for manufacturing wiring substrate and method for manufacturing electronic device'
[patent_app_type] => utility
[patent_app_number] => 11/050255
[patent_app_country] => US
[patent_app_date] => 2005-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5703
[patent_no_of_claims] => 36
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0245/20050245004.pdf
[firstpage_image] =>[orig_patent_app_number] => 11050255
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/050255 | Method for manufacturing wiring substrate and method for manufacturing electronic device | Feb 2, 2005 | Abandoned |
Array
(
[id] => 341554
[patent_doc_number] => 07501312
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-03-10
[patent_title] => 'Method of protecting semiconductor wafer and adhesive film for protection of semiconductor wafer'
[patent_app_type] => utility
[patent_app_number] => 11/051625
[patent_app_country] => US
[patent_app_date] => 2005-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10173
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/501/07501312.pdf
[firstpage_image] =>[orig_patent_app_number] => 11051625
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/051625 | Method of protecting semiconductor wafer and adhesive film for protection of semiconductor wafer | Jan 26, 2005 | Issued |
Array
(
[id] => 7197080
[patent_doc_number] => 20050164438
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-07-28
[patent_title] => 'Method for manufacturing a semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/043085
[patent_app_country] => US
[patent_app_date] => 2005-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 8512
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0164/20050164438.pdf
[firstpage_image] =>[orig_patent_app_number] => 11043085
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/043085 | Method for manufacturing a semiconductor device | Jan 26, 2005 | Abandoned |
Array
(
[id] => 5874529
[patent_doc_number] => 20060166433
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-27
[patent_title] => 'Recessed collar etch for buried strap window formation without poly2'
[patent_app_type] => utility
[patent_app_number] => 11/043756
[patent_app_country] => US
[patent_app_date] => 2005-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4891
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0166/20060166433.pdf
[firstpage_image] =>[orig_patent_app_number] => 11043756
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/043756 | Recessed collar etch for buried strap window formation without poly2 | Jan 25, 2005 | Abandoned |
Array
(
[id] => 7050861
[patent_doc_number] => 20050186748
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-08-25
[patent_title] => 'Method of manufacturing semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/038475
[patent_app_country] => US
[patent_app_date] => 2005-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 6395
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0186/20050186748.pdf
[firstpage_image] =>[orig_patent_app_number] => 11038475
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/038475 | Method of manufacturing semiconductor device | Jan 20, 2005 | Abandoned |
Array
(
[id] => 7050861
[patent_doc_number] => 20050186748
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-08-25
[patent_title] => 'Method of manufacturing semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/038475
[patent_app_country] => US
[patent_app_date] => 2005-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 6395
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0186/20050186748.pdf
[firstpage_image] =>[orig_patent_app_number] => 11038475
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/038475 | Method of manufacturing semiconductor device | Jan 20, 2005 | Abandoned |
Array
(
[id] => 6912435
[patent_doc_number] => 20050176193
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-08-11
[patent_title] => 'Method of forming a gate of a semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/036235
[patent_app_country] => US
[patent_app_date] => 2005-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 4727
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0176/20050176193.pdf
[firstpage_image] =>[orig_patent_app_number] => 11036235
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/036235 | Method of forming a gate of a semiconductor device | Jan 13, 2005 | Abandoned |
Array
(
[id] => 6996879
[patent_doc_number] => 20050136657
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-06-23
[patent_title] => 'Film-formation method for semiconductor process'
[patent_app_type] => utility
[patent_app_number] => 11/033406
[patent_app_country] => US
[patent_app_date] => 2005-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 11382
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0136/20050136657.pdf
[firstpage_image] =>[orig_patent_app_number] => 11033406
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/033406 | Film-formation method for semiconductor process | Jan 11, 2005 | Abandoned |
Array
(
[id] => 5631698
[patent_doc_number] => 20060148168
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-06
[patent_title] => 'Process for fabricating dynamic random access memory'
[patent_app_type] => utility
[patent_app_number] => 11/031656
[patent_app_country] => US
[patent_app_date] => 2005-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 2793
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0148/20060148168.pdf
[firstpage_image] =>[orig_patent_app_number] => 11031656
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/031656 | Process for fabricating dynamic random access memory | Jan 5, 2005 | Abandoned |
Array
(
[id] => 7183242
[patent_doc_number] => 20050161745
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-07-28
[patent_title] => 'CMOS device, method for fabricating the same and method for generating mask data'
[patent_app_type] => utility
[patent_app_number] => 11/028526
[patent_app_country] => US
[patent_app_date] => 2005-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3748
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0161/20050161745.pdf
[firstpage_image] =>[orig_patent_app_number] => 11028526
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/028526 | CMOS device, method for fabricating the same and method for generating mask data | Jan 4, 2005 | Abandoned |
Array
(
[id] => 5010966
[patent_doc_number] => 20070281445
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-06
[patent_title] => 'Method for Self-Supported Transfer of a Fine Layer by Pulsation after Implantation or Co-Implantation'
[patent_app_type] => utility
[patent_app_number] => 10/577175
[patent_app_country] => US
[patent_app_date] => 2004-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 6508
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0281/20070281445.pdf
[firstpage_image] =>[orig_patent_app_number] => 10577175
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/577175 | Method for self-supported transfer of a fine layer by pulsation after implantation or co-implantation | Oct 27, 2004 | Issued |
Array
(
[id] => 5250525
[patent_doc_number] => 20070131981
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-06-14
[patent_title] => 'Patterning method and field effect transistors'
[patent_app_type] => utility
[patent_app_number] => 10/575916
[patent_app_country] => US
[patent_app_date] => 2004-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4955
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0131/20070131981.pdf
[firstpage_image] =>[orig_patent_app_number] => 10575916
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/575916 | Patterning method and field effect transistors | Sep 27, 2004 | Issued |
Array
(
[id] => 5705368
[patent_doc_number] => 20060194416
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-08-31
[patent_title] => 'Method for producing single crystal ingot from which semiconductor wafer is sliced'
[patent_app_type] => utility
[patent_app_number] => 10/552275
[patent_app_country] => US
[patent_app_date] => 2004-07-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3107
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0194/20060194416.pdf
[firstpage_image] =>[orig_patent_app_number] => 10552275
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/552275 | Method for producing single crystal ingot from which semiconductor wafer is sliced | Jul 14, 2004 | Abandoned |
Array
(
[id] => 5136147
[patent_doc_number] => 20070077776
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-04-05
[patent_title] => 'Method for forming an insulating film in a semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 10/550805
[patent_app_country] => US
[patent_app_date] => 2004-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5548
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0077/20070077776.pdf
[firstpage_image] =>[orig_patent_app_number] => 10550805
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/550805 | Method for forming an insulating film in a semiconductor device | Mar 17, 2004 | Abandoned |
Array
(
[id] => 7388441
[patent_doc_number] => 20040016991
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-01-29
[patent_title] => 'Silicon nitride antifuse for use in diode-antifuse memory arrays'
[patent_app_type] => new
[patent_app_number] => 10/610804
[patent_app_country] => US
[patent_app_date] => 2003-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3401
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 28
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0016/20040016991.pdf
[firstpage_image] =>[orig_patent_app_number] => 10610804
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/610804 | Silicon nitride antifuse for use in diode-antifuse memory arrays | Jun 29, 2003 | Issued |
Array
(
[id] => 9984313
[patent_doc_number] => 09030029
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-05-12
[patent_title] => 'Chip package with die and substrate'
[patent_app_type] => utility
[patent_app_number] => 10/055568
[patent_app_country] => US
[patent_app_date] => 2002-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 39
[patent_no_of_words] => 6783
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 279
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 10055568
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/055568 | Chip package with die and substrate | Jan 21, 2002 | Issued |