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Dakota M Talbert

Examiner (ID: 4286)

Most Active Art Unit
2841
Art Unit(s)
2841
Total Applications
46
Issued Applications
8
Pending Applications
36
Abandoned Applications
2

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13976703 [patent_doc_number] => 10217718 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-02-26 [patent_title] => Method for wafer-level semiconductor die attachment [patent_app_type] => utility [patent_app_number] => 15/783455 [patent_app_country] => US [patent_app_date] => 2017-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 7657 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15783455 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/783455
Method for wafer-level semiconductor die attachment Oct 12, 2017 Issued
Array ( [id] => 14603383 [patent_doc_number] => 10354887 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-16 [patent_title] => Atomic layer etching of metal oxide [patent_app_type] => utility [patent_app_number] => 15/717076 [patent_app_country] => US [patent_app_date] => 2017-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3443 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15717076 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/717076
Atomic layer etching of metal oxide Sep 26, 2017 Issued
Array ( [id] => 14332945 [patent_doc_number] => 10297501 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-21 [patent_title] => Method for dividing wafer into individual chips [patent_app_type] => utility [patent_app_number] => 15/710557 [patent_app_country] => US [patent_app_date] => 2017-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 6467 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 311 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15710557 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/710557
Method for dividing wafer into individual chips Sep 19, 2017 Issued
Array ( [id] => 15488429 [patent_doc_number] => 10559576 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-11 [patent_title] => Manufacturing method of semiconductor device including transistor having offset insulating layers [patent_app_type] => utility [patent_app_number] => 15/662010 [patent_app_country] => US [patent_app_date] => 2017-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 5860 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15662010 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/662010
Manufacturing method of semiconductor device including transistor having offset insulating layers Jul 26, 2017 Issued
Array ( [id] => 12162713 [patent_doc_number] => 20180033979 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-01 [patent_title] => 'ORGANIC LIGHT EMITTING DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/660711 [patent_app_country] => US [patent_app_date] => 2017-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 52 [patent_figures_cnt] => 52 [patent_no_of_words] => 31586 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15660711 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/660711
Organic light emitting display device and method of manufacturing the same Jul 25, 2017 Issued
Array ( [id] => 12027148 [patent_doc_number] => 20170317247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING GANG BONDING AND SEMICONDUCTOR DEVICE FABRICATED BY THE SAME' [patent_app_type] => utility [patent_app_number] => 15/646099 [patent_app_country] => US [patent_app_date] => 2017-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9137 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15646099 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/646099
METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING GANG BONDING AND SEMICONDUCTOR DEVICE FABRICATED BY THE SAME Jul 10, 2017 Abandoned
Array ( [id] => 13030961 [patent_doc_number] => 10038106 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-31 [patent_title] => Termination structure for gallium nitride Schottky diode [patent_app_type] => utility [patent_app_number] => 15/637334 [patent_app_country] => US [patent_app_date] => 2017-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 29 [patent_no_of_words] => 6809 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15637334 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/637334
Termination structure for gallium nitride Schottky diode Jun 28, 2017 Issued
Array ( [id] => 13951075 [patent_doc_number] => 10211319 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-19 [patent_title] => Stress retention in fins of fin field-effect transistors [patent_app_type] => utility [patent_app_number] => 15/633934 [patent_app_country] => US [patent_app_date] => 2017-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 6065 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15633934 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/633934
Stress retention in fins of fin field-effect transistors Jun 26, 2017 Issued
Array ( [id] => 12478482 [patent_doc_number] => 09991416 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-05 [patent_title] => Method for manufacturing light emitting diode with InGaN/GaN superlattice [patent_app_type] => utility [patent_app_number] => 15/632127 [patent_app_country] => US [patent_app_date] => 2017-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 6223 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15632127 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/632127
Method for manufacturing light emitting diode with InGaN/GaN superlattice Jun 22, 2017 Issued
Array ( [id] => 14828267 [patent_doc_number] => 10411150 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-10 [patent_title] => Optical isolation systems and circuits and photon detectors with extended lateral P-N junctions [patent_app_type] => utility [patent_app_number] => 15/612327 [patent_app_country] => US [patent_app_date] => 2017-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 23 [patent_no_of_words] => 9123 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15612327 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/612327
Optical isolation systems and circuits and photon detectors with extended lateral P-N junctions Jun 1, 2017 Issued
Array ( [id] => 13243167 [patent_doc_number] => 10134795 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-20 [patent_title] => Semiconductor device with multiple substrates electrically connected through an insulating film and manufacturing method [patent_app_type] => utility [patent_app_number] => 15/607845 [patent_app_country] => US [patent_app_date] => 2017-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 9085 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15607845 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/607845
Semiconductor device with multiple substrates electrically connected through an insulating film and manufacturing method May 29, 2017 Issued
Array ( [id] => 11959725 [patent_doc_number] => 20170263878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-14 [patent_title] => 'Light-Emitting Element, Light-Emitting Device, Electronic Device, and Lighting Device' [patent_app_type] => utility [patent_app_number] => 15/602450 [patent_app_country] => US [patent_app_date] => 2017-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 21985 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15602450 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/602450
Light-emitting element, light-emitting device, electronic device, and lighting device May 22, 2017 Issued
Array ( [id] => 14397607 [patent_doc_number] => 10312094 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-04 [patent_title] => AlO [patent_app_type] => utility [patent_app_number] => 15/600260 [patent_app_country] => US [patent_app_date] => 2017-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 39 [patent_no_of_words] => 8124 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15600260 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/600260
AlO May 18, 2017 Issued
Array ( [id] => 11946098 [patent_doc_number] => 20170250249 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-31 [patent_title] => 'Method of Forming Ultra-Thin Nanowires' [patent_app_type] => utility [patent_app_number] => 15/595253 [patent_app_country] => US [patent_app_date] => 2017-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5532 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15595253 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/595253
Method of forming ultra-thin nanowires May 14, 2017 Issued
Array ( [id] => 12054458 [patent_doc_number] => 20170330801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-16 [patent_title] => 'METHOD OF FORMING GATE OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE HAVING SAME' [patent_app_type] => utility [patent_app_number] => 15/591944 [patent_app_country] => US [patent_app_date] => 2017-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11688 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15591944 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/591944
Method of forming gate of semiconductor device and semiconductor device having same May 9, 2017 Issued
Array ( [id] => 12032807 [patent_doc_number] => 20170322906 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-09 [patent_title] => 'Processor with In-Package Look-Up Table' [patent_app_type] => utility [patent_app_number] => 15/587359 [patent_app_country] => US [patent_app_date] => 2017-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3816 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15587359 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/587359
Processor with In-Package Look-Up Table May 3, 2017 Abandoned
Array ( [id] => 12990589 [patent_doc_number] => 20170345942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-30 [patent_title] => THIN-FILM TRANSISTOR, DISPLAY UNIT, AND ELECTRONIC APPARATUS [patent_app_type] => utility [patent_app_number] => 15/584008 [patent_app_country] => US [patent_app_date] => 2017-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6514 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15584008 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/584008
THIN-FILM TRANSISTOR, DISPLAY UNIT, AND ELECTRONIC APPARATUS Apr 30, 2017 Abandoned
Array ( [id] => 17878512 [patent_doc_number] => 11450535 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-20 [patent_title] => Manufacturing method for semiconductor package including filling member and membrane member [patent_app_type] => utility [patent_app_number] => 16/090602 [patent_app_country] => US [patent_app_date] => 2017-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 17 [patent_no_of_words] => 6547 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16090602 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/090602
Manufacturing method for semiconductor package including filling member and membrane member Apr 2, 2017 Issued
Array ( [id] => 16394453 [patent_doc_number] => 20200335394 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-22 [patent_title] => METHOD OF MANUFACTURING SUBSTRATE AND THE SAME SUBSTRATE [patent_app_type] => utility [patent_app_number] => 16/090059 [patent_app_country] => US [patent_app_date] => 2017-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9835 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16090059 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/090059
METHOD OF MANUFACTURING SUBSTRATE AND THE SAME SUBSTRATE Mar 28, 2017 Abandoned
Array ( [id] => 12122562 [patent_doc_number] => 20180006148 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'LDMOS TRANSISTOR AND FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/436905 [patent_app_country] => US [patent_app_date] => 2017-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5962 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15436905 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/436905
LDMOS transistor and fabrication method thereof Feb 19, 2017 Issued
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