Search

Dale M. Shaw

Examiner (ID: 10183)

Most Active Art Unit
2301
Art Unit(s)
2301, 2311, 2302, 2317
Total Applications
433
Issued Applications
390
Pending Applications
0
Abandoned Applications
43

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2877501 [patent_doc_number] => 05097434 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-03-17 [patent_title] => 'Hybrid signed-digit/logarithmic number system processor' [patent_app_type] => 1 [patent_app_number] => 7/653757 [patent_app_country] => US [patent_app_date] => 1991-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5792 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 437 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/097/05097434.pdf [firstpage_image] =>[orig_patent_app_number] => 653757 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/653757
Hybrid signed-digit/logarithmic number system processor Feb 10, 1991 Issued
07/592351 HYBRID SIGNED-DIGIT/LOGARITHMIC NUMBER SYSTEM PROCESSOR Oct 2, 1990 Abandoned
Array ( [id] => 2869814 [patent_doc_number] => 05150315 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-22 [patent_title] => 'Electrical resistor value decoding calculator' [patent_app_type] => 1 [patent_app_number] => 7/544736 [patent_app_country] => US [patent_app_date] => 1990-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2182 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/150/05150315.pdf [firstpage_image] =>[orig_patent_app_number] => 544736 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/544736
Electrical resistor value decoding calculator Jun 26, 1990 Issued
Array ( [id] => 2682462 [patent_doc_number] => 05027307 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-06-25 [patent_title] => 'Lighting application calculator' [patent_app_type] => 1 [patent_app_number] => 7/526778 [patent_app_country] => US [patent_app_date] => 1990-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 5971 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/027/05027307.pdf [firstpage_image] =>[orig_patent_app_number] => 526778 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/526778
Lighting application calculator May 16, 1990 Issued
07/473976 IMPROVED ORDINAL VALUE FILTER Apr 16, 1990 Abandoned
Array ( [id] => 3082216 [patent_doc_number] => 05337266 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-09 [patent_title] => 'Method and apparatus for fast logarithmic addition and subtraction' [patent_app_type] => 1 [patent_app_number] => 7/512574 [patent_app_country] => US [patent_app_date] => 1990-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5647 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 679 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/337/05337266.pdf [firstpage_image] =>[orig_patent_app_number] => 512574 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/512574
Method and apparatus for fast logarithmic addition and subtraction Apr 9, 1990 Issued
Array ( [id] => 2826976 [patent_doc_number] => 05081603 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-01-14 [patent_title] => 'Amplitude-control system for a signal generator' [patent_app_type] => 1 [patent_app_number] => 7/502707 [patent_app_country] => US [patent_app_date] => 1990-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 4808 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/081/05081603.pdf [firstpage_image] =>[orig_patent_app_number] => 502707 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/502707
Amplitude-control system for a signal generator Apr 1, 1990 Issued
Array ( [id] => 2758338 [patent_doc_number] => 05031134 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-09 [patent_title] => 'System for evaluating multiple integrals' [patent_app_type] => 1 [patent_app_number] => 7/499758 [patent_app_country] => US [patent_app_date] => 1990-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5332 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 369 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/031/05031134.pdf [firstpage_image] =>[orig_patent_app_number] => 499758 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/499758
System for evaluating multiple integrals Mar 26, 1990 Issued
07/500436 PIPELINED FAST FOURIER TRANSFORM (FFT) ARCHITECTURE Mar 22, 1990 Abandoned
07/495583 SYSTEM FOR COMPRESSION AND DECOMPRESSION OF VIDEO DATA USING DISCRETE COSINE TRANSFORM AND CODING TECHNIQUES Mar 15, 1990 Abandoned
Array ( [id] => 2734497 [patent_doc_number] => 05058045 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-15 [patent_title] => 'Battery and expansion slot changeable computer' [patent_app_type] => 1 [patent_app_number] => 7/491321 [patent_app_country] => US [patent_app_date] => 1990-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 1266 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/058/05058045.pdf [firstpage_image] =>[orig_patent_app_number] => 491321 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/491321
Battery and expansion slot changeable computer Mar 8, 1990 Issued
Array ( [id] => 2830628 [patent_doc_number] => 05173870 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-22 [patent_title] => 'Transmission and latch circuit for logic signal' [patent_app_type] => 1 [patent_app_number] => 7/489385 [patent_app_country] => US [patent_app_date] => 1990-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 8806 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 313 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/173/05173870.pdf [firstpage_image] =>[orig_patent_app_number] => 489385 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/489385
Transmission and latch circuit for logic signal Mar 4, 1990 Issued
07/487182 COMPUTER WITH SEPARATE LEFT AND RIGHT HAND KEKYBOARD STRUCTURES Feb 28, 1990 Abandoned
Array ( [id] => 2691867 [patent_doc_number] => 05046035 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-03 [patent_title] => 'High-performance user programmable logic device (PLD)' [patent_app_type] => 1 [patent_app_number] => 7/487022 [patent_app_country] => US [patent_app_date] => 1990-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3269 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/046/05046035.pdf [firstpage_image] =>[orig_patent_app_number] => 487022 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/487022
High-performance user programmable logic device (PLD) Feb 27, 1990 Issued
Array ( [id] => 2858518 [patent_doc_number] => 05111421 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-05 [patent_title] => 'System for performing addition and subtraction of signed magnitude floating point binary numbers' [patent_app_type] => 1 [patent_app_number] => 7/484752 [patent_app_country] => US [patent_app_date] => 1990-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4697 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/111/05111421.pdf [firstpage_image] =>[orig_patent_app_number] => 484752 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/484752
System for performing addition and subtraction of signed magnitude floating point binary numbers Feb 25, 1990 Issued
Array ( [id] => 2858500 [patent_doc_number] => 05111420 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-05 [patent_title] => 'Arithmetic unit using a digital filter forming a digital signal processing system with signal bypass' [patent_app_type] => 1 [patent_app_number] => 7/483585 [patent_app_country] => US [patent_app_date] => 1990-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 12 [patent_no_of_words] => 2807 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/111/05111420.pdf [firstpage_image] =>[orig_patent_app_number] => 483585 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/483585
Arithmetic unit using a digital filter forming a digital signal processing system with signal bypass Feb 21, 1990 Issued
Array ( [id] => 2640589 [patent_doc_number] => 04977532 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-12-11 [patent_title] => 'Industrial computer system with removable equipment drawer' [patent_app_type] => 1 [patent_app_number] => 7/483338 [patent_app_country] => US [patent_app_date] => 1990-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2258 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/977/04977532.pdf [firstpage_image] =>[orig_patent_app_number] => 483338 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/483338
Industrial computer system with removable equipment drawer Feb 19, 1990 Issued
Array ( [id] => 2858427 [patent_doc_number] => 05111416 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-05 [patent_title] => 'Pseudo random noise code generator for selectively generating a code or its mirror image from common data' [patent_app_type] => 1 [patent_app_number] => 7/479931 [patent_app_country] => US [patent_app_date] => 1990-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5318 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/111/05111416.pdf [firstpage_image] =>[orig_patent_app_number] => 479931 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/479931
Pseudo random noise code generator for selectively generating a code or its mirror image from common data Feb 13, 1990 Issued
Array ( [id] => 2678346 [patent_doc_number] => 05073864 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-12-17 [patent_title] => 'Parallel string processor and method for a minicomputer' [patent_app_type] => 1 [patent_app_number] => 7/478844 [patent_app_country] => US [patent_app_date] => 1990-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 39 [patent_no_of_words] => 23912 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/073/05073864.pdf [firstpage_image] =>[orig_patent_app_number] => 478844 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/478844
Parallel string processor and method for a minicomputer Feb 11, 1990 Issued
Array ( [id] => 2708175 [patent_doc_number] => 04989170 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-29 [patent_title] => 'Hybrid stochastic gradient for convergence of adaptive filter' [patent_app_type] => 1 [patent_app_number] => 7/478719 [patent_app_country] => US [patent_app_date] => 1990-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2123 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/989/04989170.pdf [firstpage_image] =>[orig_patent_app_number] => 478719 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/478719
Hybrid stochastic gradient for convergence of adaptive filter Feb 7, 1990 Issued
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