Search

Dale M. Shaw

Examiner (ID: 10068)

Most Active Art Unit
2301
Art Unit(s)
2317, 2311, 2302, 2301
Total Applications
433
Issued Applications
390
Pending Applications
0
Abandoned Applications
43

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2317128 [patent_doc_number] => 04638449 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-01-20 [patent_title] => 'Multiplier architecture' [patent_app_type] => 1 [patent_app_number] => 6/765567 [patent_app_country] => US [patent_app_date] => 1985-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5489 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 624 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/638/04638449.pdf [firstpage_image] =>[orig_patent_app_number] => 765567 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/765567
Multiplier architecture Aug 13, 1985 Issued
Array ( [id] => 2247667 [patent_doc_number] => 04622650 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-11-11 [patent_title] => 'Circuitry for generating scalar products and sums of floating point numbers with maximum accuracy' [patent_app_type] => 1 [patent_app_number] => 6/764517 [patent_app_country] => US [patent_app_date] => 1985-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 12452 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/622/04622650.pdf [firstpage_image] =>[orig_patent_app_number] => 764517 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/764517
Circuitry for generating scalar products and sums of floating point numbers with maximum accuracy Aug 8, 1985 Issued
Array ( [id] => 2534545 [patent_doc_number] => 04797807 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-01-10 [patent_title] => 'Multiple channel fast orthogonalization network' [patent_app_type] => 1 [patent_app_number] => 6/761648 [patent_app_country] => US [patent_app_date] => 1985-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3594 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/797/04797807.pdf [firstpage_image] =>[orig_patent_app_number] => 761648 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/761648
Multiple channel fast orthogonalization network Aug 1, 1985 Issued
Array ( [id] => 2396313 [patent_doc_number] => 04764887 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-08-16 [patent_title] => 'Carry-bypass arithmetic logic unit' [patent_app_type] => 1 [patent_app_number] => 6/762581 [patent_app_country] => US [patent_app_date] => 1985-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4306 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/764/04764887.pdf [firstpage_image] =>[orig_patent_app_number] => 762581 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/762581
Carry-bypass arithmetic logic unit Aug 1, 1985 Issued
Array ( [id] => 2517527 [patent_doc_number] => 04796217 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-01-03 [patent_title] => 'Rounding unit for use in arithmetic processing of floating point data' [patent_app_type] => 1 [patent_app_number] => 6/754102 [patent_app_country] => US [patent_app_date] => 1985-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4873 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 326 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/796/04796217.pdf [firstpage_image] =>[orig_patent_app_number] => 754102 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/754102
Rounding unit for use in arithmetic processing of floating point data Jul 11, 1985 Issued
Array ( [id] => 2524270 [patent_doc_number] => 04852038 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-07-25 [patent_title] => 'Logarithmic calculating apparatus' [patent_app_type] => 1 [patent_app_number] => 6/751302 [patent_app_country] => US [patent_app_date] => 1985-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 23 [patent_no_of_words] => 11435 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 341 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/852/04852038.pdf [firstpage_image] =>[orig_patent_app_number] => 751302 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/751302
Logarithmic calculating apparatus Jul 1, 1985 Issued
Array ( [id] => 2562710 [patent_doc_number] => 04803648 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-02-07 [patent_title] => 'Echo canceller using an adaptive finite impulse response filter' [patent_app_type] => 1 [patent_app_number] => 6/749354 [patent_app_country] => US [patent_app_date] => 1985-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 7829 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 355 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/803/04803648.pdf [firstpage_image] =>[orig_patent_app_number] => 749354 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/749354
Echo canceller using an adaptive finite impulse response filter Jun 26, 1985 Issued
Array ( [id] => 2455749 [patent_doc_number] => 04755960 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-07-05 [patent_title] => 'Waveform data compressing circuit' [patent_app_type] => 1 [patent_app_number] => 6/746898 [patent_app_country] => US [patent_app_date] => 1985-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6916 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/755/04755960.pdf [firstpage_image] =>[orig_patent_app_number] => 746898 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/746898
Waveform data compressing circuit Jun 19, 1985 Issued
Array ( [id] => 2535349 [patent_doc_number] => 04797846 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-01-10 [patent_title] => 'Digital resonant filter' [patent_app_type] => 1 [patent_app_number] => 6/735234 [patent_app_country] => US [patent_app_date] => 1985-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3551 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 320 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/797/04797846.pdf [firstpage_image] =>[orig_patent_app_number] => 735234 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/735234
Digital resonant filter May 16, 1985 Issued
Array ( [id] => 2519970 [patent_doc_number] => 04831579 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-05-16 [patent_title] => 'Full adder circuit having an exclusive-OR circuit' [patent_app_type] => 1 [patent_app_number] => 6/734142 [patent_app_country] => US [patent_app_date] => 1985-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3570 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 368 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/831/04831579.pdf [firstpage_image] =>[orig_patent_app_number] => 734142 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/734142
Full adder circuit having an exclusive-OR circuit May 14, 1985 Issued
Array ( [id] => 2464404 [patent_doc_number] => 04718035 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-01-05 [patent_title] => 'Logic operation circuit having an exclusive-OR circuit' [patent_app_type] => 1 [patent_app_number] => 6/734078 [patent_app_country] => US [patent_app_date] => 1985-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3375 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/718/04718035.pdf [firstpage_image] =>[orig_patent_app_number] => 734078 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/734078
Logic operation circuit having an exclusive-OR circuit May 14, 1985 Issued
Array ( [id] => 2396610 [patent_doc_number] => 04773034 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-09-20 [patent_title] => 'Adaptive equalizer utilizing a plurality of multiplier-accumulator devices' [patent_app_type] => 1 [patent_app_number] => 6/732403 [patent_app_country] => US [patent_app_date] => 1985-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 4164 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/773/04773034.pdf [firstpage_image] =>[orig_patent_app_number] => 732403 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/732403
Adaptive equalizer utilizing a plurality of multiplier-accumulator devices May 8, 1985 Issued
Array ( [id] => 2218340 [patent_doc_number] => 04599700 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-07-08 [patent_title] => 'Process and device for digital frequency generation' [patent_app_type] => 1 [patent_app_number] => 6/731597 [patent_app_country] => US [patent_app_date] => 1985-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3464 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 396 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/599/04599700.pdf [firstpage_image] =>[orig_patent_app_number] => 731597 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/731597
Process and device for digital frequency generation May 5, 1985 Issued
Array ( [id] => 2628473 [patent_doc_number] => 04894793 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-01-16 [patent_title] => 'Calorie calculator with menu retrieval function' [patent_app_type] => 1 [patent_app_number] => 6/728888 [patent_app_country] => US [patent_app_date] => 1985-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3563 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/894/04894793.pdf [firstpage_image] =>[orig_patent_app_number] => 728888 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/728888
Calorie calculator with menu retrieval function Apr 29, 1985 Issued
Array ( [id] => 2423157 [patent_doc_number] => 04736332 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-04-05 [patent_title] => 'Portable personal computing system' [patent_app_type] => 1 [patent_app_number] => 6/727944 [patent_app_country] => US [patent_app_date] => 1985-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2577 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/736/04736332.pdf [firstpage_image] =>[orig_patent_app_number] => 727944 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/727944
Portable personal computing system Apr 25, 1985 Issued
Array ( [id] => 2392824 [patent_doc_number] => 04709346 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-11-24 [patent_title] => 'CMOS subtractor' [patent_app_type] => 1 [patent_app_number] => 6/718412 [patent_app_country] => US [patent_app_date] => 1985-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1988 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 524 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/709/04709346.pdf [firstpage_image] =>[orig_patent_app_number] => 718412 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/718412
CMOS subtractor Mar 31, 1985 Issued
Array ( [id] => 2452755 [patent_doc_number] => 04740907 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-04-26 [patent_title] => 'Full adder circuit using differential transistor pairs' [patent_app_type] => 1 [patent_app_number] => 6/716090 [patent_app_country] => US [patent_app_date] => 1985-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 2411 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 531 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/740/04740907.pdf [firstpage_image] =>[orig_patent_app_number] => 716090 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/716090
Full adder circuit using differential transistor pairs Mar 25, 1985 Issued
Array ( [id] => 2424901 [patent_doc_number] => 04771396 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-09-13 [patent_title] => 'Digital filters' [patent_app_type] => 1 [patent_app_number] => 6/711686 [patent_app_country] => US [patent_app_date] => 1985-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 6806 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/771/04771396.pdf [firstpage_image] =>[orig_patent_app_number] => 711686 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/711686
Digital filters Mar 13, 1985 Issued
Array ( [id] => 2494572 [patent_doc_number] => 04866654 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-09-12 [patent_title] => 'Digital multiplying circuit' [patent_app_type] => 1 [patent_app_number] => 6/704635 [patent_app_country] => US [patent_app_date] => 1985-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 5261 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/866/04866654.pdf [firstpage_image] =>[orig_patent_app_number] => 704635 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/704635
Digital multiplying circuit Feb 21, 1985 Issued
Array ( [id] => 2432270 [patent_doc_number] => 04774685 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-09-27 [patent_title] => 'Approximation system' [patent_app_type] => 1 [patent_app_number] => 6/696809 [patent_app_country] => US [patent_app_date] => 1985-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6156 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/774/04774685.pdf [firstpage_image] =>[orig_patent_app_number] => 696809 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/696809
Approximation system Jan 30, 1985 Issued
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