Search

Dale M. Shaw

Examiner (ID: 10183)

Most Active Art Unit
2301
Art Unit(s)
2301, 2311, 2302, 2317
Total Applications
433
Issued Applications
390
Pending Applications
0
Abandoned Applications
43

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2715584 [patent_doc_number] => 05068817 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-26 [patent_title] => 'Non-recursive half-band filter with complex valued coefficients for complex input and output signals' [patent_app_type] => 1 [patent_app_number] => 7/408516 [patent_app_country] => US [patent_app_date] => 1989-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 1998 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 517 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/068/05068817.pdf [firstpage_image] =>[orig_patent_app_number] => 408516 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/408516
Non-recursive half-band filter with complex valued coefficients for complex input and output signals Aug 17, 1989 Issued
Array ( [id] => 2750855 [patent_doc_number] => 05003286 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-26 [patent_title] => 'Binary magnitude comparator with asynchronous compare operation and method therefor' [patent_app_type] => 1 [patent_app_number] => 7/390556 [patent_app_country] => US [patent_app_date] => 1989-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3236 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/003/05003286.pdf [firstpage_image] =>[orig_patent_app_number] => 390556 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/390556
Binary magnitude comparator with asynchronous compare operation and method therefor Aug 6, 1989 Issued
Array ( [id] => 2633107 [patent_doc_number] => 04956798 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-09-11 [patent_title] => 'Arbitrary waveform generator with adjustable spacing' [patent_app_type] => 1 [patent_app_number] => 7/389076 [patent_app_country] => US [patent_app_date] => 1989-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2485 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/956/04956798.pdf [firstpage_image] =>[orig_patent_app_number] => 389076 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/389076
Arbitrary waveform generator with adjustable spacing Aug 2, 1989 Issued
07/385326 DIGITAL FILTER AND METHOD OF DESIGN Jul 24, 1989 Abandoned
Array ( [id] => 2840366 [patent_doc_number] => 05128886 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-07 [patent_title] => 'Using long distance filters in the presence of round-off errors' [patent_app_type] => 1 [patent_app_number] => 7/380045 [patent_app_country] => US [patent_app_date] => 1989-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1411 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/128/05128886.pdf [firstpage_image] =>[orig_patent_app_number] => 380045 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/380045
Using long distance filters in the presence of round-off errors Jul 13, 1989 Issued
07/366376 METHOD AND APPARATUS FOR GENERATING MATHEMATICAL FUNCTIONS Jun 13, 1989 Abandoned
Array ( [id] => 2682410 [patent_doc_number] => 04984188 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-08 [patent_title] => 'Digital signal processing device for calculating real and imaginary parts of an input signal' [patent_app_type] => 1 [patent_app_number] => 7/363395 [patent_app_country] => US [patent_app_date] => 1989-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3089 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 492 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/984/04984188.pdf [firstpage_image] =>[orig_patent_app_number] => 363395 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/363395
Digital signal processing device for calculating real and imaginary parts of an input signal Jun 5, 1989 Issued
Array ( [id] => 2773145 [patent_doc_number] => 05063530 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-05 [patent_title] => 'Method of adding/subtracting floating-point representation data and apparatus for the same' [patent_app_type] => 1 [patent_app_number] => 7/359145 [patent_app_country] => US [patent_app_date] => 1989-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 7357 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 597 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/063/05063530.pdf [firstpage_image] =>[orig_patent_app_number] => 359145 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/359145
Method of adding/subtracting floating-point representation data and apparatus for the same May 30, 1989 Issued
07/358469 SYSTEM FOR EVALUATING MULTIPLE INTEGRALS May 29, 1989 Abandoned
Array ( [id] => 2603931 [patent_doc_number] => 04933894 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-06-12 [patent_title] => 'Circuit and method for adding binary numbers with a difference of one or less' [patent_app_type] => 1 [patent_app_number] => 7/356966 [patent_app_country] => US [patent_app_date] => 1989-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2187 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/933/04933894.pdf [firstpage_image] =>[orig_patent_app_number] => 356966 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/356966
Circuit and method for adding binary numbers with a difference of one or less May 23, 1989 Issued
Array ( [id] => 2703006 [patent_doc_number] => 05020015 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-28 [patent_title] => 'Multichannel digital signal correlator or structurator' [patent_app_type] => 1 [patent_app_number] => 7/359755 [patent_app_country] => US [patent_app_date] => 1989-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 3678 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/020/05020015.pdf [firstpage_image] =>[orig_patent_app_number] => 359755 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/359755
Multichannel digital signal correlator or structurator May 15, 1989 Issued
Array ( [id] => 2758238 [patent_doc_number] => 05031129 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-09 [patent_title] => 'Parallel pseudo-random generator for emulating a serial pseudo-random generator and method for carrying out same' [patent_app_type] => 1 [patent_app_number] => 7/351175 [patent_app_country] => US [patent_app_date] => 1989-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 10299 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/031/05031129.pdf [firstpage_image] =>[orig_patent_app_number] => 351175 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/351175
Parallel pseudo-random generator for emulating a serial pseudo-random generator and method for carrying out same May 11, 1989 Issued
Array ( [id] => 2840286 [patent_doc_number] => 05099444 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-03-24 [patent_title] => 'Peripheral data acquisition transmission and control device' [patent_app_type] => 1 [patent_app_number] => 7/350115 [patent_app_country] => US [patent_app_date] => 1989-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 30 [patent_no_of_words] => 16112 [patent_no_of_claims] => 72 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/099/05099444.pdf [firstpage_image] =>[orig_patent_app_number] => 350115 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/350115
Peripheral data acquisition transmission and control device May 8, 1989 Issued
Array ( [id] => 2762932 [patent_doc_number] => 05072418 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-12-10 [patent_title] => 'Series maxium/minimum function computing devices, systems and methods' [patent_app_type] => 1 [patent_app_number] => 7/347596 [patent_app_country] => US [patent_app_date] => 1989-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 44 [patent_no_of_words] => 27685 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/072/05072418.pdf [firstpage_image] =>[orig_patent_app_number] => 347596 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/347596
Series maxium/minimum function computing devices, systems and methods May 3, 1989 Issued
Array ( [id] => 2664471 [patent_doc_number] => 04972356 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-11-20 [patent_title] => 'Systolic IIR decimation filter' [patent_app_type] => 1 [patent_app_number] => 7/345855 [patent_app_country] => US [patent_app_date] => 1989-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 24 [patent_no_of_words] => 4279 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/972/04972356.pdf [firstpage_image] =>[orig_patent_app_number] => 345855 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/345855
Systolic IIR decimation filter Apr 30, 1989 Issued
Array ( [id] => 2716410 [patent_doc_number] => 05001662 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-19 [patent_title] => 'Method and apparatus for multi-gauge computation' [patent_app_type] => 1 [patent_app_number] => 7/345116 [patent_app_country] => US [patent_app_date] => 1989-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 6008 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/001/05001662.pdf [firstpage_image] =>[orig_patent_app_number] => 345116 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/345116
Method and apparatus for multi-gauge computation Apr 27, 1989 Issued
Array ( [id] => 2716736 [patent_doc_number] => 04982357 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-01 [patent_title] => 'Plural dummy select chain logic synthesis network' [patent_app_type] => 1 [patent_app_number] => 7/344566 [patent_app_country] => US [patent_app_date] => 1989-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4639 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 326 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/982/04982357.pdf [firstpage_image] =>[orig_patent_app_number] => 344566 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/344566
Plural dummy select chain logic synthesis network Apr 27, 1989 Issued
Array ( [id] => 2679702 [patent_doc_number] => 05047973 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-10 [patent_title] => 'High speed numerical processor for performing a plurality of numeric functions' [patent_app_type] => 1 [patent_app_number] => 7/343465 [patent_app_country] => US [patent_app_date] => 1989-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3413 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/047/05047973.pdf [firstpage_image] =>[orig_patent_app_number] => 343465 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/343465
High speed numerical processor for performing a plurality of numeric functions Apr 25, 1989 Issued
07/337896 HYBRID SIGNED-DIGIT/LOGARITHMIC NUMBER SYSTEM PROCESSOR Apr 13, 1989 Abandoned
Array ( [id] => 2688738 [patent_doc_number] => 05005150 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-02 [patent_title] => 'Digital signal processors' [patent_app_type] => 1 [patent_app_number] => 7/336956 [patent_app_country] => US [patent_app_date] => 1989-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4547 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/005/05005150.pdf [firstpage_image] =>[orig_patent_app_number] => 336956 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/336956
Digital signal processors Apr 11, 1989 Issued
Menu