Search

Dale M. Shaw

Examiner (ID: 10068)

Most Active Art Unit
2301
Art Unit(s)
2317, 2311, 2302, 2301
Total Applications
433
Issued Applications
390
Pending Applications
0
Abandoned Applications
43

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2563724 [patent_doc_number] => 04897807 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-01-30 [patent_title] => 'Switch data input device' [patent_app_type] => 1 [patent_app_number] => 7/139971 [patent_app_country] => US [patent_app_date] => 1987-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4424 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/897/04897807.pdf [firstpage_image] =>[orig_patent_app_number] => 139971 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/139971
Switch data input device Dec 30, 1987 Issued
Array ( [id] => 2655062 [patent_doc_number] => 04896286 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-01-23 [patent_title] => 'Floating-point arithmetic apparatus' [patent_app_type] => 1 [patent_app_number] => 7/137924 [patent_app_country] => US [patent_app_date] => 1987-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4906 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 568 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/896/04896286.pdf [firstpage_image] =>[orig_patent_app_number] => 137924 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/137924
Floating-point arithmetic apparatus Dec 27, 1987 Issued
Array ( [id] => 2532785 [patent_doc_number] => 04873658 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-10-10 [patent_title] => 'Integrated digital signal processing circuit for performing cosine transformation' [patent_app_type] => 1 [patent_app_number] => 7/135266 [patent_app_country] => US [patent_app_date] => 1987-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3174 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/873/04873658.pdf [firstpage_image] =>[orig_patent_app_number] => 135266 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/135266
Integrated digital signal processing circuit for performing cosine transformation Dec 20, 1987 Issued
07/135676 METHOD AND APPARATUS FOR HIGH SPEED LOGARITHMIC SUBTRACTION Dec 20, 1987 Abandoned
Array ( [id] => 2532301 [patent_doc_number] => 04884232 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-11-28 [patent_title] => 'Parallel processing circuits for high speed calculation of the dot product of large dimensional vectors' [patent_app_type] => 1 [patent_app_number] => 7/133096 [patent_app_country] => US [patent_app_date] => 1987-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2174 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/884/04884232.pdf [firstpage_image] =>[orig_patent_app_number] => 133096 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/133096
Parallel processing circuits for high speed calculation of the dot product of large dimensional vectors Dec 13, 1987 Issued
Array ( [id] => 2500570 [patent_doc_number] => 04860240 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-08-22 [patent_title] => 'Low-latency two\'s complement bit-serial multiplier' [patent_app_type] => 1 [patent_app_number] => 7/134271 [patent_app_country] => US [patent_app_date] => 1987-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5412 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 426 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/860/04860240.pdf [firstpage_image] =>[orig_patent_app_number] => 134271 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/134271
Low-latency two's complement bit-serial multiplier Dec 13, 1987 Issued
07/130645 DIGITAL SIGNAL PROCESSING DEVICE FOR CALCULATING REAL AND IMAGINARY PARTS OF AN INPUT SIGNAL Dec 8, 1987 Abandoned
Array ( [id] => 2677449 [patent_doc_number] => 04905173 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-02-27 [patent_title] => 'Hardened shop-floor data terminal' [patent_app_type] => 1 [patent_app_number] => 7/130161 [patent_app_country] => US [patent_app_date] => 1987-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1911 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/905/04905173.pdf [firstpage_image] =>[orig_patent_app_number] => 130161 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/130161
Hardened shop-floor data terminal Dec 7, 1987 Issued
Array ( [id] => 2640296 [patent_doc_number] => 04958310 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-09-18 [patent_title] => 'Digital frequency synthesizer having multiple processing paths' [patent_app_type] => 1 [patent_app_number] => 7/122946 [patent_app_country] => US [patent_app_date] => 1987-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 3749 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/958/04958310.pdf [firstpage_image] =>[orig_patent_app_number] => 122946 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/122946
Digital frequency synthesizer having multiple processing paths Nov 18, 1987 Issued
Array ( [id] => 2636162 [patent_doc_number] => 04951238 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-08-21 [patent_title] => 'Processor for executing arithmetic operations on input data and constant data with a small error' [patent_app_type] => 1 [patent_app_number] => 7/114975 [patent_app_country] => US [patent_app_date] => 1987-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3234 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/951/04951238.pdf [firstpage_image] =>[orig_patent_app_number] => 114975 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/114975
Processor for executing arithmetic operations on input data and constant data with a small error Oct 29, 1987 Issued
Array ( [id] => 2503947 [patent_doc_number] => 04847801 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-07-11 [patent_title] => 'Compact galois field multiplier' [patent_app_type] => 1 [patent_app_number] => 7/112335 [patent_app_country] => US [patent_app_date] => 1987-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3930 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/847/04847801.pdf [firstpage_image] =>[orig_patent_app_number] => 112335 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/112335
Compact galois field multiplier Oct 25, 1987 Issued
Array ( [id] => 2491000 [patent_doc_number] => 04823301 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-04-18 [patent_title] => 'Method and circuit for computing reciprocals' [patent_app_type] => 1 [patent_app_number] => 7/111965 [patent_app_country] => US [patent_app_date] => 1987-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5428 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/823/04823301.pdf [firstpage_image] =>[orig_patent_app_number] => 111965 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/111965
Method and circuit for computing reciprocals Oct 21, 1987 Issued
Array ( [id] => 2528263 [patent_doc_number] => 04855946 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-08-08 [patent_title] => 'Reduced size phase-to-amplitude converter in a numerically controlled oscillator' [patent_app_type] => 1 [patent_app_number] => 7/111224 [patent_app_country] => US [patent_app_date] => 1987-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 3442 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/855/04855946.pdf [firstpage_image] =>[orig_patent_app_number] => 111224 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/111224
Reduced size phase-to-amplitude converter in a numerically controlled oscillator Oct 21, 1987 Issued
Array ( [id] => 2494493 [patent_doc_number] => 04866650 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-09-12 [patent_title] => 'Electronic calculator having matrix calculations' [patent_app_type] => 1 [patent_app_number] => 7/110795 [patent_app_country] => US [patent_app_date] => 1987-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 31 [patent_no_of_words] => 7621 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/866/04866650.pdf [firstpage_image] =>[orig_patent_app_number] => 110795 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/110795
Electronic calculator having matrix calculations Oct 20, 1987 Issued
Array ( [id] => 2498747 [patent_doc_number] => 04829460 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-05-09 [patent_title] => 'Barrel shifter' [patent_app_type] => 1 [patent_app_number] => 7/108214 [patent_app_country] => US [patent_app_date] => 1987-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5067 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/829/04829460.pdf [firstpage_image] =>[orig_patent_app_number] => 108214 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/108214
Barrel shifter Oct 13, 1987 Issued
Array ( [id] => 2567336 [patent_doc_number] => 04817031 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-03-28 [patent_title] => 'Adder' [patent_app_type] => 1 [patent_app_number] => 7/101425 [patent_app_country] => US [patent_app_date] => 1987-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3565 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/817/04817031.pdf [firstpage_image] =>[orig_patent_app_number] => 101425 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/101425
Adder Sep 27, 1987 Issued
Array ( [id] => 2538236 [patent_doc_number] => 04862401 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-08-29 [patent_title] => 'Apparatus, specifically a balance, having a display of results of successive function sequences' [patent_app_type] => 1 [patent_app_number] => 7/095650 [patent_app_country] => US [patent_app_date] => 1987-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2802 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/862/04862401.pdf [firstpage_image] =>[orig_patent_app_number] => 095650 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/095650
Apparatus, specifically a balance, having a display of results of successive function sequences Sep 13, 1987 Issued
Array ( [id] => 2567968 [patent_doc_number] => 04853887 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-08-01 [patent_title] => 'Binary adder having a fixed operand and parallel-serial binary multiplier incorporating such an adder' [patent_app_type] => 1 [patent_app_number] => 7/095214 [patent_app_country] => US [patent_app_date] => 1987-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 17 [patent_no_of_words] => 5728 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/853/04853887.pdf [firstpage_image] =>[orig_patent_app_number] => 095214 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/095214
Binary adder having a fixed operand and parallel-serial binary multiplier incorporating such an adder Sep 10, 1987 Issued
Array ( [id] => 2602315 [patent_doc_number] => 04918641 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-04-17 [patent_title] => 'High-performance programmable logic device' [patent_app_type] => 1 [patent_app_number] => 7/089644 [patent_app_country] => US [patent_app_date] => 1987-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2567 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/918/04918641.pdf [firstpage_image] =>[orig_patent_app_number] => 089644 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/089644
High-performance programmable logic device Aug 25, 1987 Issued
07/088421 PARALLEL STRING PROCESSOR AND METHOD FOR A MINICOMPUTER Aug 19, 1987 Abandoned
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