
Dan Davidson
Examiner (ID: 17565)
| Most Active Art Unit | 2651 |
| Art Unit(s) | 2651, 2753, 2627 |
| Total Applications | 393 |
| Issued Applications | 356 |
| Pending Applications | 11 |
| Abandoned Applications | 26 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7644142
[patent_doc_number] => 06473832
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-10-29
[patent_title] => 'Load/store unit having pre-cache and post-cache queues for low latency load memory operations'
[patent_app_type] => B1
[patent_app_number] => 09/314035
[patent_app_country] => US
[patent_app_date] => 1999-05-18
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 27587
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/473/06473832.pdf
[firstpage_image] =>[orig_patent_app_number] => 09314035
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/314035 | Load/store unit having pre-cache and post-cache queues for low latency load memory operations | May 17, 1999 | Issued |
Array
(
[id] => 1587448
[patent_doc_number] => 06425066
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-07-23
[patent_title] => 'Integrated circuit comprising at least two memories'
[patent_app_type] => B1
[patent_app_number] => 09/313926
[patent_app_country] => US
[patent_app_date] => 1999-05-18
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[pdf_file] => patents/06/425/06425066.pdf
[firstpage_image] =>[orig_patent_app_number] => 09313926
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/313926 | Integrated circuit comprising at least two memories | May 17, 1999 | Issued |
Array
(
[id] => 1456635
[patent_doc_number] => 06457075
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-09-24
[patent_title] => 'Synchronous memory system with automatic burst mode switching as a function of the selected bus master'
[patent_app_type] => B1
[patent_app_number] => 09/313244
[patent_app_country] => US
[patent_app_date] => 1999-05-17
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/313244 | Synchronous memory system with automatic burst mode switching as a function of the selected bus master | May 16, 1999 | Issued |
Array
(
[id] => 6019980
[patent_doc_number] => 20020103958
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-08-01
[patent_title] => 'PROGRAMMABLE NONVOLATILE MEMORY APPARATUS AND MICROCOMPUTER USING THE SAME'
[patent_app_type] => new
[patent_app_number] => 09/242961
[patent_app_country] => US
[patent_app_date] => 1999-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[pdf_file] => publications/A1/0103/20020103958.pdf
[firstpage_image] =>[orig_patent_app_number] => 09242961
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/242961 | Programmable nonvolatile memory apparatus and microcomputer using the same | May 16, 1999 | Issued |
Array
(
[id] => 1438669
[patent_doc_number] => 06356979
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[patent_issue_date] => 2002-03-12
[patent_title] => 'System and method for selectively presenting logical storage units to multiple host operating systems in a networked computing system'
[patent_app_type] => B1
[patent_app_number] => 09/312944
[patent_app_country] => US
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[pdf_file] => patents/06/356/06356979.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/312944 | System and method for selectively presenting logical storage units to multiple host operating systems in a networked computing system | May 16, 1999 | Issued |
Array
(
[id] => 4138785
[patent_doc_number] => 06102539
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-08-15
[patent_title] => 'Sunglass lens laminate'
[patent_app_type] => 1
[patent_app_number] => 9/313498
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/313498 | Sunglass lens laminate | May 16, 1999 | Issued |
Array
(
[id] => 1505963
[patent_doc_number] => 06487632
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[patent_issue_date] => 2002-11-26
[patent_title] => 'Emulation technique for variable-length disk system to access data in a fixed-length disk system'
[patent_app_type] => B1
[patent_app_number] => 09/313781
[patent_app_country] => US
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[pdf_file] => patents/06/487/06487632.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/313781 | Emulation technique for variable-length disk system to access data in a fixed-length disk system | May 16, 1999 | Issued |
Array
(
[id] => 4312191
[patent_doc_number] => 06237065
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-05-22
[patent_title] => 'Preemptive replacement strategy for a caching dynamic translator'
[patent_app_type] => 1
[patent_app_number] => 9/312300
[patent_app_country] => US
[patent_app_date] => 1999-05-14
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/312300 | Preemptive replacement strategy for a caching dynamic translator | May 13, 1999 | Issued |
Array
(
[id] => 4349604
[patent_doc_number] => 06321300
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[patent_issue_date] => 2001-11-20
[patent_title] => 'Apparatus and method for dynamically reconfigurable timed flushing of a queue of coalescing write buffers'
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[patent_app_number] => 9/311987
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/311987 | Apparatus and method for dynamically reconfigurable timed flushing of a queue of coalescing write buffers | May 13, 1999 | Issued |
Array
(
[id] => 1601965
[patent_doc_number] => 06385687
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-05-07
[patent_title] => 'Method and apparatus for simultaneously accessing the tag and data arrays of a memory device'
[patent_app_type] => B2
[patent_app_number] => 09/312122
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/312122 | Method and apparatus for simultaneously accessing the tag and data arrays of a memory device | May 13, 1999 | Issued |
Array
(
[id] => 4290325
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[patent_issue_date] => 2001-10-23
[patent_title] => 'Storing data in a grey code system'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/311954 | Storing data in a grey code system | May 13, 1999 | Issued |
Array
(
[id] => 4280815
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/311216 | Sequential detection and prestaging methods for a disk storage subsystem | May 12, 1999 | Issued |
Array
(
[id] => 4388087
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[patent_title] => 'Methods and structure for RAID level migration within a logical unit'
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Array
(
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[patent_title] => 'FIFO system with variable-width interface to host processor'
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Array
(
[id] => 1595864
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/294662 | Reproducing apparatus and method, program offering medium and storage medium | Apr 18, 1999 | Issued |
| 09/194937 | DATA RECORDING DEVICE AND METHOD, AND DISK ARRAY CONTROL DEVICE AND METHOD | Apr 15, 1999 | Abandoned |
Array
(
[id] => 1549537
[patent_doc_number] => 06374324
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[patent_issue_date] => 2002-04-16
[patent_title] => 'Flash memory array access method and device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/271444 | Flash memory array access method and device | Mar 17, 1999 | Issued |
Array
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[patent_title] => 'Method and device for controlling access to memory'
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Array
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Array
(
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