Search

Dan Davidson

Examiner (ID: 17565)

Most Active Art Unit
2651
Art Unit(s)
2651, 2753, 2627
Total Applications
393
Issued Applications
356
Pending Applications
11
Abandoned Applications
26

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1602239 [patent_doc_number] => 06493795 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-10 [patent_title] => 'Data storage system' [patent_app_type] => B1 [patent_app_number] => 09/223417 [patent_app_country] => US [patent_app_date] => 1998-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 7754 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/493/06493795.pdf [firstpage_image] =>[orig_patent_app_number] => 09223417 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/223417
Data storage system Dec 29, 1998 Issued
Array ( [id] => 1434050 [patent_doc_number] => 06341340 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-22 [patent_title] => 'Transitioning ownership of data items between ownership groups' [patent_app_type] => B1 [patent_app_number] => 09/222593 [patent_app_country] => US [patent_app_date] => 1998-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8172 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/341/06341340.pdf [firstpage_image] =>[orig_patent_app_number] => 09222593 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/222593
Transitioning ownership of data items between ownership groups Dec 27, 1998 Issued
Array ( [id] => 1567433 [patent_doc_number] => 06363459 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Microprocessor device' [patent_app_type] => B1 [patent_app_number] => 09/221782 [patent_app_country] => US [patent_app_date] => 1998-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4460 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/363/06363459.pdf [firstpage_image] =>[orig_patent_app_number] => 09221782 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/221782
Microprocessor device Dec 27, 1998 Issued
Array ( [id] => 1418441 [patent_doc_number] => 06546439 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-08 [patent_title] => 'Method and system for improved data access' [patent_app_type] => B1 [patent_app_number] => 09/207970 [patent_app_country] => US [patent_app_date] => 1998-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6623 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/546/06546439.pdf [firstpage_image] =>[orig_patent_app_number] => 09207970 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/207970
Method and system for improved data access Dec 8, 1998 Issued
Array ( [id] => 1429814 [patent_doc_number] => 06510497 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-21 [patent_title] => 'Method and system for page-state sensitive memory control and access in data processing systems' [patent_app_type] => B1 [patent_app_number] => 09/207971 [patent_app_country] => US [patent_app_date] => 1998-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 9556 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/510/06510497.pdf [firstpage_image] =>[orig_patent_app_number] => 09207971 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/207971
Method and system for page-state sensitive memory control and access in data processing systems Dec 8, 1998 Issued
Array ( [id] => 1533134 [patent_doc_number] => 06480936 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-12 [patent_title] => 'Storing apparatus having a dynamic buffer for random or sequential access' [patent_app_type] => B1 [patent_app_number] => 09/197076 [patent_app_country] => US [patent_app_date] => 1998-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 74 [patent_no_of_words] => 17109 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/480/06480936.pdf [firstpage_image] =>[orig_patent_app_number] => 09197076 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/197076
Storing apparatus having a dynamic buffer for random or sequential access Nov 19, 1998 Issued
Array ( [id] => 1480995 [patent_doc_number] => 06389505 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-14 [patent_title] => 'Restore tracking system for DRAM' [patent_app_type] => B1 [patent_app_number] => 09/196086 [patent_app_country] => US [patent_app_date] => 1998-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 6039 [patent_no_of_claims] => 80 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/389/06389505.pdf [firstpage_image] =>[orig_patent_app_number] => 09196086 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/196086
Restore tracking system for DRAM Nov 18, 1998 Issued
Array ( [id] => 1452337 [patent_doc_number] => 06370632 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-09 [patent_title] => 'Method and apparatus that enforces a regional memory model in hierarchical memory systems' [patent_app_type] => B1 [patent_app_number] => 09/195758 [patent_app_country] => US [patent_app_date] => 1998-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7333 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/370/06370632.pdf [firstpage_image] =>[orig_patent_app_number] => 09195758 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/195758
Method and apparatus that enforces a regional memory model in hierarchical memory systems Nov 17, 1998 Issued
Array ( [id] => 1443915 [patent_doc_number] => 06336170 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-01 [patent_title] => 'Method and system in a distributed shared-memory data processing system for determining utilization of shared-memory included within nodes by a designated application' [patent_app_type] => B1 [patent_app_number] => 09/170898 [patent_app_country] => US [patent_app_date] => 1998-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5054 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/336/06336170.pdf [firstpage_image] =>[orig_patent_app_number] => 09170898 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/170898
Method and system in a distributed shared-memory data processing system for determining utilization of shared-memory included within nodes by a designated application Oct 12, 1998 Issued
Array ( [id] => 4325537 [patent_doc_number] => 06253297 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-26 [patent_title] => 'Memory control using memory state information for reducing access latency' [patent_app_type] => 1 [patent_app_number] => 9/170834 [patent_app_country] => US [patent_app_date] => 1998-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 14387 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/253/06253297.pdf [firstpage_image] =>[orig_patent_app_number] => 170834 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/170834
Memory control using memory state information for reducing access latency Oct 12, 1998 Issued
Array ( [id] => 7642389 [patent_doc_number] => 06430657 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-06 [patent_title] => 'COMPUTER SYSTEM THAT PROVIDES ATOMICITY BY USING A TLB TO INDICATE WHETHER AN EXPORTABLE INSTRUCTION SHOULD BE EXECUTED USING CACHE COHERENCY OR BY EXPORTING THE EXPORTABLE INSTRUCTION, AND EMULATES INSTRUCTIONS SPECIFYING A BUS LOCK' [patent_app_type] => B1 [patent_app_number] => 09/170137 [patent_app_country] => US [patent_app_date] => 1998-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5281 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 7 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/430/06430657.pdf [firstpage_image] =>[orig_patent_app_number] => 09170137 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/170137
COMPUTER SYSTEM THAT PROVIDES ATOMICITY BY USING A TLB TO INDICATE WHETHER AN EXPORTABLE INSTRUCTION SHOULD BE EXECUTED USING CACHE COHERENCY OR BY EXPORTING THE EXPORTABLE INSTRUCTION, AND EMULATES INSTRUCTIONS SPECIFYING A BUS LOCK Oct 11, 1998 Issued
Array ( [id] => 4424772 [patent_doc_number] => 06230248 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-08 [patent_title] => 'Method and apparatus for pre-validating regions in a virtual addressing scheme' [patent_app_type] => 1 [patent_app_number] => 9/170140 [patent_app_country] => US [patent_app_date] => 1998-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3219 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/230/06230248.pdf [firstpage_image] =>[orig_patent_app_number] => 170140 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/170140
Method and apparatus for pre-validating regions in a virtual addressing scheme Oct 11, 1998 Issued
Array ( [id] => 1602261 [patent_doc_number] => 06493804 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-10 [patent_title] => 'Global file system and data storage device locks' [patent_app_type] => B1 [patent_app_number] => 09/164957 [patent_app_country] => US [patent_app_date] => 1998-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 22778 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/493/06493804.pdf [firstpage_image] =>[orig_patent_app_number] => 09164957 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/164957
Global file system and data storage device locks Sep 30, 1998 Issued
Array ( [id] => 1495346 [patent_doc_number] => 06418518 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-09 [patent_title] => 'Decoupled address and data access to an SDRAM' [patent_app_type] => B1 [patent_app_number] => 09/157079 [patent_app_country] => US [patent_app_date] => 1998-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 7233 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/418/06418518.pdf [firstpage_image] =>[orig_patent_app_number] => 09157079 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/157079
Decoupled address and data access to an SDRAM Sep 17, 1998 Issued
Array ( [id] => 1430301 [patent_doc_number] => 06526471 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-25 [patent_title] => 'Method and apparatus for a high-speed memory subsystem' [patent_app_type] => B1 [patent_app_number] => 09/156466 [patent_app_country] => US [patent_app_date] => 1998-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4530 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/526/06526471.pdf [firstpage_image] =>[orig_patent_app_number] => 09156466 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/156466
Method and apparatus for a high-speed memory subsystem Sep 17, 1998 Issued
Array ( [id] => 4279678 [patent_doc_number] => 06205511 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-20 [patent_title] => 'SDRAM address translator' [patent_app_type] => 1 [patent_app_number] => 9/156984 [patent_app_country] => US [patent_app_date] => 1998-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 6477 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/205/06205511.pdf [firstpage_image] =>[orig_patent_app_number] => 156984 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/156984
SDRAM address translator Sep 17, 1998 Issued
Array ( [id] => 6908543 [patent_doc_number] => 20010011310 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-02 [patent_title] => 'METHOD OF AND APPARATUS FOR CAPTURING AND PROCESSING CONTINUOUS MEDIA-BASED DATA STREAMS TRANSMITTED OVER AN IEEE 1394 SERIAL BUS' [patent_app_type] => new [patent_app_number] => 09/156533 [patent_app_country] => US [patent_app_date] => 1998-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5875 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0011/20010011310.pdf [firstpage_image] =>[orig_patent_app_number] => 09156533 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/156533
Method of and apparatus for capturing and processing continuous media-based data streams transmitted over an IEEE 1394 serial bus Sep 16, 1998 Issued
Array ( [id] => 4309971 [patent_doc_number] => 06212592 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-03 [patent_title] => 'Computer system for processing system management interrupt requests' [patent_app_type] => 1 [patent_app_number] => 9/156182 [patent_app_country] => US [patent_app_date] => 1998-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4609 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/212/06212592.pdf [firstpage_image] =>[orig_patent_app_number] => 156182 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/156182
Computer system for processing system management interrupt requests Sep 16, 1998 Issued
Array ( [id] => 4422386 [patent_doc_number] => 06173363 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'Data transmission device for reading data from a memory medium and transmitting the data to a magnetic reproducing apparatus with a reduced noise' [patent_app_type] => 1 [patent_app_number] => 9/152018 [patent_app_country] => US [patent_app_date] => 1998-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 6477 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/173/06173363.pdf [firstpage_image] =>[orig_patent_app_number] => 152018 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/152018
Data transmission device for reading data from a memory medium and transmitting the data to a magnetic reproducing apparatus with a reduced noise Sep 10, 1998 Issued
Array ( [id] => 4424557 [patent_doc_number] => 06266751 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-24 [patent_title] => 'Continuously sliding window method and apparatus for sharing single-ported memory banks between two agents' [patent_app_type] => 1 [patent_app_number] => 9/141510 [patent_app_country] => US [patent_app_date] => 1998-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 3831 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/266/06266751.pdf [firstpage_image] =>[orig_patent_app_number] => 141510 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/141510
Continuously sliding window method and apparatus for sharing single-ported memory banks between two agents Aug 26, 1998 Issued
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