
Dan Davidson
Examiner (ID: 17565)
| Most Active Art Unit | 2651 |
| Art Unit(s) | 2651, 2753, 2627 |
| Total Applications | 393 |
| Issued Applications | 356 |
| Pending Applications | 11 |
| Abandoned Applications | 26 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1602239
[patent_doc_number] => 06493795
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-12-10
[patent_title] => 'Data storage system'
[patent_app_type] => B1
[patent_app_number] => 09/223417
[patent_app_country] => US
[patent_app_date] => 1998-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 7754
[patent_no_of_claims] => 9
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/493/06493795.pdf
[firstpage_image] =>[orig_patent_app_number] => 09223417
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/223417 | Data storage system | Dec 29, 1998 | Issued |
Array
(
[id] => 1434050
[patent_doc_number] => 06341340
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-01-22
[patent_title] => 'Transitioning ownership of data items between ownership groups'
[patent_app_type] => B1
[patent_app_number] => 09/222593
[patent_app_country] => US
[patent_app_date] => 1998-12-28
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[patent_no_of_words] => 8172
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/341/06341340.pdf
[firstpage_image] =>[orig_patent_app_number] => 09222593
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/222593 | Transitioning ownership of data items between ownership groups | Dec 27, 1998 | Issued |
Array
(
[id] => 1567433
[patent_doc_number] => 06363459
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-03-26
[patent_title] => 'Microprocessor device'
[patent_app_type] => B1
[patent_app_number] => 09/221782
[patent_app_country] => US
[patent_app_date] => 1998-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 4460
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/221782 | Microprocessor device | Dec 27, 1998 | Issued |
Array
(
[id] => 1418441
[patent_doc_number] => 06546439
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[patent_kind] => B1
[patent_issue_date] => 2003-04-08
[patent_title] => 'Method and system for improved data access'
[patent_app_type] => B1
[patent_app_number] => 09/207970
[patent_app_country] => US
[patent_app_date] => 1998-12-09
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[pdf_file] => patents/06/546/06546439.pdf
[firstpage_image] =>[orig_patent_app_number] => 09207970
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/207970 | Method and system for improved data access | Dec 8, 1998 | Issued |
Array
(
[id] => 1429814
[patent_doc_number] => 06510497
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[patent_issue_date] => 2003-01-21
[patent_title] => 'Method and system for page-state sensitive memory control and access in data processing systems'
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[patent_app_number] => 09/207971
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/207971 | Method and system for page-state sensitive memory control and access in data processing systems | Dec 8, 1998 | Issued |
Array
(
[id] => 1533134
[patent_doc_number] => 06480936
[patent_country] => US
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[patent_issue_date] => 2002-11-12
[patent_title] => 'Storing apparatus having a dynamic buffer for random or sequential access'
[patent_app_type] => B1
[patent_app_number] => 09/197076
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[firstpage_image] =>[orig_patent_app_number] => 09197076
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/197076 | Storing apparatus having a dynamic buffer for random or sequential access | Nov 19, 1998 | Issued |
Array
(
[id] => 1480995
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[patent_title] => 'Restore tracking system for DRAM'
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[pdf_file] => patents/06/389/06389505.pdf
[firstpage_image] =>[orig_patent_app_number] => 09196086
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/196086 | Restore tracking system for DRAM | Nov 18, 1998 | Issued |
Array
(
[id] => 1452337
[patent_doc_number] => 06370632
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[patent_issue_date] => 2002-04-09
[patent_title] => 'Method and apparatus that enforces a regional memory model in hierarchical memory systems'
[patent_app_type] => B1
[patent_app_number] => 09/195758
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[pdf_file] => patents/06/370/06370632.pdf
[firstpage_image] =>[orig_patent_app_number] => 09195758
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/195758 | Method and apparatus that enforces a regional memory model in hierarchical memory systems | Nov 17, 1998 | Issued |
Array
(
[id] => 1443915
[patent_doc_number] => 06336170
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-01-01
[patent_title] => 'Method and system in a distributed shared-memory data processing system for determining utilization of shared-memory included within nodes by a designated application'
[patent_app_type] => B1
[patent_app_number] => 09/170898
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Array
(
[id] => 4325537
[patent_doc_number] => 06253297
[patent_country] => US
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[patent_issue_date] => 2001-06-26
[patent_title] => 'Memory control using memory state information for reducing access latency'
[patent_app_type] => 1
[patent_app_number] => 9/170834
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Array
(
[id] => 7642389
[patent_doc_number] => 06430657
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[patent_issue_date] => 2002-08-06
[patent_title] => 'COMPUTER SYSTEM THAT PROVIDES ATOMICITY BY USING A TLB TO INDICATE WHETHER AN EXPORTABLE INSTRUCTION SHOULD BE EXECUTED USING CACHE COHERENCY OR BY EXPORTING THE EXPORTABLE INSTRUCTION, AND EMULATES INSTRUCTIONS SPECIFYING A BUS LOCK'
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Array
(
[id] => 4424772
[patent_doc_number] => 06230248
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[patent_kind] => NA
[patent_issue_date] => 2001-05-08
[patent_title] => 'Method and apparatus for pre-validating regions in a virtual addressing scheme'
[patent_app_type] => 1
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/170140 | Method and apparatus for pre-validating regions in a virtual addressing scheme | Oct 11, 1998 | Issued |
Array
(
[id] => 1602261
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[patent_title] => 'Global file system and data storage device locks'
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Array
(
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[patent_title] => 'Decoupled address and data access to an SDRAM'
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Array
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Array
(
[id] => 4279678
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Array
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[patent_title] => 'METHOD OF AND APPARATUS FOR CAPTURING AND PROCESSING CONTINUOUS MEDIA-BASED DATA STREAMS TRANSMITTED OVER AN IEEE 1394 SERIAL BUS'
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Array
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Array
(
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