Search

Dana Lynne Meyrow

Examiner (ID: 11885, Phone: (571)272-6034 , Office: P/2916 )

Most Active Art Unit
2916
Art Unit(s)
2912, 2916
Total Applications
2854
Issued Applications
2822
Pending Applications
0
Abandoned Applications
30
Created with Highcharts 8.2.2Number of ApplicationsStatus of ApplicationsIssuedAbandoned2013201420152016201720182019202020210102030405060

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16944342 [patent_doc_number] => 11056594 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-06 [patent_title] => Semiconductor device having fin structures [patent_app_type] => utility [patent_app_number] => 16/908441 [patent_app_country] => US [patent_app_date] => 2020-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 22 [patent_no_of_words] => 10203 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16908441 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/908441
Semiconductor device having fin structures Jun 21, 2020 Issued
Array ( [id] => 16803369 [patent_doc_number] => 10998324 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-04 [patent_title] => Semiconductor device comprising work function metal pattern in boundary region and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 16/890456 [patent_app_country] => US [patent_app_date] => 2020-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 8398 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16890456 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/890456
Semiconductor device comprising work function metal pattern in boundary region and method for fabricating the same Jun 1, 2020 Issued
Array ( [id] => 16332446 [patent_doc_number] => 20200303412 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING STACK STRUCTURE AND TRENCHES [patent_app_type] => utility [patent_app_number] => 16/890400 [patent_app_country] => US [patent_app_date] => 2020-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8736 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16890400 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/890400
Semiconductor device including stack structure and trenches Jun 1, 2020 Issued
Array ( [id] => 16209513 [patent_doc_number] => 20200242503 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => CO-PLANAR WAVEGUIDE FLUX QUBITS [patent_app_type] => utility [patent_app_number] => 16/849363 [patent_app_country] => US [patent_app_date] => 2020-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11193 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16849363 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/849363
Co-planar waveguide flux qubits Apr 14, 2020 Issued
Array ( [id] => 16163499 [patent_doc_number] => 20200219982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-09 [patent_title] => WAFER STRUCTURE WITH MODE SUPPRESSION [patent_app_type] => utility [patent_app_number] => 16/821559 [patent_app_country] => US [patent_app_date] => 2020-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4071 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16821559 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/821559
Wafer structure with mode suppression Mar 16, 2020 Issued
Array ( [id] => 16699909 [patent_doc_number] => 10950517 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-16 [patent_title] => Printed circuit board and semiconductor package [patent_app_type] => utility [patent_app_number] => 16/781410 [patent_app_country] => US [patent_app_date] => 2020-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 6259 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16781410 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/781410
Printed circuit board and semiconductor package Feb 3, 2020 Issued
Array ( [id] => 17011055 [patent_doc_number] => 20210242216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-05 [patent_title] => INTERCONNECT AND MEMORY STRUCTURES HAVING REDUCED TOPOGRAPHY VARIATION FORMED IN THE BEOL [patent_app_type] => utility [patent_app_number] => 16/777540 [patent_app_country] => US [patent_app_date] => 2020-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7109 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16777540 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/777540
Interconnect and memory structures having reduced topography variation formed in the BEOL Jan 29, 2020 Issued
Array ( [id] => 16502716 [patent_doc_number] => 10868117 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-15 [patent_title] => Systems and methods for forming nanowires using anodic oxidation [patent_app_type] => utility [patent_app_number] => 16/715966 [patent_app_country] => US [patent_app_date] => 2019-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 42 [patent_no_of_words] => 4836 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16715966 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/715966
Systems and methods for forming nanowires using anodic oxidation Dec 15, 2019 Issued
Array ( [id] => 15807403 [patent_doc_number] => 20200126844 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => METHODS AND APPARATUS FOR SMOOTHING DYNAMIC RANDOM ACCESS MEMORY BIT LINE METAL [patent_app_type] => utility [patent_app_number] => 16/690620 [patent_app_country] => US [patent_app_date] => 2019-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8486 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16690620 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/690620
Methods and apparatus for smoothing dynamic random access memory bit line metal Nov 20, 2019 Issued
Array ( [id] => 16120681 [patent_doc_number] => 20200212363 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-02 [patent_title] => DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 16/671263 [patent_app_country] => US [patent_app_date] => 2019-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9149 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16671263 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/671263
Display apparatus Oct 31, 2019 Issued
Array ( [id] => 16759904 [patent_doc_number] => 10978461 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-13 [patent_title] => Antifuse array and method of forming antifuse using anodic oxidation [patent_app_type] => utility [patent_app_number] => 16/656270 [patent_app_country] => US [patent_app_date] => 2019-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 56 [patent_no_of_words] => 8347 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16656270 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/656270
Antifuse array and method of forming antifuse using anodic oxidation Oct 16, 2019 Issued
Array ( [id] => 16692364 [patent_doc_number] => 20210074843 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => STRUCTURE OF HIGH VOLTAGE TRANSISTOR AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/601364 [patent_app_country] => US [patent_app_date] => 2019-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3892 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16601364 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/601364
Structure of high voltage transistor and method for fabricating the same Oct 13, 2019 Issued
Array ( [id] => 16081033 [patent_doc_number] => 20200194503 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => ORGANIC LIGHT-EMITTING DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/593570 [patent_app_country] => US [patent_app_date] => 2019-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3458 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16593570 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/593570
Organic light-emitting display apparatus and method of manufacturing the same Oct 3, 2019 Issued
Array ( [id] => 17152687 [patent_doc_number] => 11145778 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-12 [patent_title] => Monolithic silicon photomultiplier array [patent_app_type] => utility [patent_app_number] => 16/577035 [patent_app_country] => US [patent_app_date] => 2019-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5045 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16577035 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/577035
Monolithic silicon photomultiplier array Sep 19, 2019 Issued
Array ( [id] => 15688263 [patent_doc_number] => 20200098795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/560208 [patent_app_country] => US [patent_app_date] => 2019-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10321 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16560208 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/560208
Display device and method of manufacturing the same Sep 3, 2019 Issued
Array ( [id] => 16193887 [patent_doc_number] => 20200234736 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-23 [patent_title] => VARIABLE RESISTANCE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/560127 [patent_app_country] => US [patent_app_date] => 2019-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10212 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16560127 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/560127
Variable resistance memory device Sep 3, 2019 Issued
Array ( [id] => 16402287 [patent_doc_number] => 20200343145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-29 [patent_title] => SEMICONDUCTOR DEVICE HAVING DEEP TRENCH STRUCTURE AND METHOD OF MANUFACTURING THEREOF [patent_app_type] => utility [patent_app_number] => 16/560147 [patent_app_country] => US [patent_app_date] => 2019-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6687 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16560147 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/560147
Semiconductor device having deep trench structure and method of manufacturing thereof Sep 3, 2019 Issued
Array ( [id] => 16660643 [patent_doc_number] => 20210057280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-25 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE [patent_app_type] => utility [patent_app_number] => 16/549195 [patent_app_country] => US [patent_app_date] => 2019-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10621 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16549195 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/549195
Transistor metal gate and method of manufacture Aug 22, 2019 Issued
Array ( [id] => 17166395 [patent_doc_number] => 11152508 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-19 [patent_title] => Semiconductor device including two-dimensional material layer [patent_app_type] => utility [patent_app_number] => 16/549148 [patent_app_country] => US [patent_app_date] => 2019-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 6504 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16549148 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/549148
Semiconductor device including two-dimensional material layer Aug 22, 2019 Issued
Array ( [id] => 16631706 [patent_doc_number] => 20210050359 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-18 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICE CONTAINING ALTERNATING STACK OF SOURCE LAYERS AND DRAIN LAYERS AND VERTICAL GATE ELECTRODES [patent_app_type] => utility [patent_app_number] => 16/539103 [patent_app_country] => US [patent_app_date] => 2019-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22029 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16539103 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/539103
Three-dimensional memory device containing alternating stack of source layers and drain layers and vertical gate electrodes Aug 12, 2019 Issued
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