
Dang T. Ton
Examiner (ID: 7746, Phone: (571)272-3171 , Office: P/2476 )
| Most Active Art Unit | 2476 |
| Art Unit(s) | 2476, 2661, OPT, 2603, 2666, 2616, 2899, 2732, 2475 |
| Total Applications | 2064 |
| Issued Applications | 1715 |
| Pending Applications | 214 |
| Abandoned Applications | 162 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9582919
[patent_doc_number] => 08772922
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-07-08
[patent_title] => 'Chip structure having redistribution layer'
[patent_app_type] => utility
[patent_app_number] => 13/349051
[patent_app_country] => US
[patent_app_date] => 2012-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 12
[patent_no_of_words] => 3205
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 223
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13349051
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/349051 | Chip structure having redistribution layer | Jan 11, 2012 | Issued |
Array
(
[id] => 8244829
[patent_doc_number] => 08202756
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-06-19
[patent_title] => 'Organic EL device'
[patent_app_type] => utility
[patent_app_number] => 13/341071
[patent_app_country] => US
[patent_app_date] => 2011-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 6027
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/202/08202756.pdf
[firstpage_image] =>[orig_patent_app_number] => 13341071
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/341071 | Organic EL device | Dec 29, 2011 | Issued |
Array
(
[id] => 8760572
[patent_doc_number] => 08421095
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-04-16
[patent_title] => 'Light-emitting diode array'
[patent_app_type] => utility
[patent_app_number] => 13/341414
[patent_app_country] => US
[patent_app_date] => 2011-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 15
[patent_no_of_words] => 3126
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13341414
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/341414 | Light-emitting diode array | Dec 29, 2011 | Issued |
Array
(
[id] => 8139741
[patent_doc_number] => 20120094417
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-04-19
[patent_title] => 'DIODE ENERGY CONVERTER FOR CHEMICAL KINETIC ELECTRON ENERGY TRANSFER'
[patent_app_type] => utility
[patent_app_number] => 13/336529
[patent_app_country] => US
[patent_app_date] => 2011-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5761
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0094/20120094417.pdf
[firstpage_image] =>[orig_patent_app_number] => 13336529
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/336529 | Diode energy converter for chemical kinetic electron energy transfer | Dec 22, 2011 | Issued |
Array
(
[id] => 9344876
[patent_doc_number] => 08664023
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-03-04
[patent_title] => 'Deposition method, deposition film, and method for producing organic electroluminescence display device'
[patent_app_type] => utility
[patent_app_number] => 13/976011
[patent_app_country] => US
[patent_app_date] => 2011-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 37
[patent_no_of_words] => 27248
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 203
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13976011
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/976011 | Deposition method, deposition film, and method for producing organic electroluminescence display device | Dec 19, 2011 | Issued |
Array
(
[id] => 8120809
[patent_doc_number] => 20120084955
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-04-12
[patent_title] => 'THIN FILM CAPACITOR AND METHOD OF FABRICATION THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/328440
[patent_app_country] => US
[patent_app_date] => 2011-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 8416
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0084/20120084955.pdf
[firstpage_image] =>[orig_patent_app_number] => 13328440
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/328440 | Thin film capacitor and method of fabrication thereof | Dec 15, 2011 | Issued |
Array
(
[id] => 8055181
[patent_doc_number] => 20120077328
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-03-29
[patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE, METHOD OF FABRICATING THE NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND PROCESS OF WRITING DATA ON THE NONVOLATILE SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/308629
[patent_app_country] => US
[patent_app_date] => 2011-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 10968
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0077/20120077328.pdf
[firstpage_image] =>[orig_patent_app_number] => 13308629
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/308629 | Nonvolatile semiconductor memory device, method of fabricating the nonvolatile semiconductor memory device and process of writing data on the nonvolatile semiconductor memory device | Nov 30, 2011 | Issued |
Array
(
[id] => 10010569
[patent_doc_number] => 09054095
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-06-09
[patent_title] => 'Semiconductor device and method of forming WLP with semiconductor die embedded within penetrable encapsulant between TSV interposers'
[patent_app_type] => utility
[patent_app_number] => 13/284003
[patent_app_country] => US
[patent_app_date] => 2011-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 40
[patent_no_of_words] => 11146
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13284003
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/284003 | Semiconductor device and method of forming WLP with semiconductor die embedded within penetrable encapsulant between TSV interposers | Oct 27, 2011 | Issued |
Array
(
[id] => 7773220
[patent_doc_number] => 20120038064
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-02-16
[patent_title] => 'Semiconductor Device and Method of Forming Wafer-Level Multi-Row Etched Leadframe With Base Leads and Embedded Semiconductor Die'
[patent_app_type] => utility
[patent_app_number] => 13/284811
[patent_app_country] => US
[patent_app_date] => 2011-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 12080
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0038/20120038064.pdf
[firstpage_image] =>[orig_patent_app_number] => 13284811
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/284811 | Semiconductor device and method of forming wafer-level multi-row etched leadframe with base leads and embedded semiconductor die | Oct 27, 2011 | Issued |
Array
(
[id] => 7782047
[patent_doc_number] => 20120043603
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-02-23
[patent_title] => 'Method of manufacturing semiconductor device, and semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 13/317697
[patent_app_country] => US
[patent_app_date] => 2011-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 4913
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0043/20120043603.pdf
[firstpage_image] =>[orig_patent_app_number] => 13317697
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/317697 | Method of manufacturing semiconductor device, and semiconductor device | Oct 25, 2011 | Issued |
Array
(
[id] => 8483340
[patent_doc_number] => 20120282747
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-11-08
[patent_title] => 'EFFECTING SELECTIVITY OF SILICON OR SILICON-GERMANIUM DEPOSITION ON A SILICON OR SILICON-GERMANIUM SUBSTRATE BY DOPING'
[patent_app_type] => utility
[patent_app_number] => 13/279466
[patent_app_country] => US
[patent_app_date] => 2011-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 6768
[patent_no_of_claims] => 37
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13279466
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/279466 | Effecting selectivity of silicon or silicon-germanium deposition on a silicon or silicon-germanium substrate by doping | Oct 23, 2011 | Issued |
Array
(
[id] => 8560114
[patent_doc_number] => 08334177
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-12-18
[patent_title] => 'Methods for forming isolated fin structures on bulk semiconductor material'
[patent_app_type] => utility
[patent_app_number] => 13/278010
[patent_app_country] => US
[patent_app_date] => 2011-10-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 5016
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13278010
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/278010 | Methods for forming isolated fin structures on bulk semiconductor material | Oct 19, 2011 | Issued |
Array
(
[id] => 7755790
[patent_doc_number] => 20120028387
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-02-02
[patent_title] => 'DUAL PANEL TYPE ORGANIC ELECTROLUMINESCENT DISPLAY DEVICE AND METHOD FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/243227
[patent_app_country] => US
[patent_app_date] => 2011-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 6607
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0028/20120028387.pdf
[firstpage_image] =>[orig_patent_app_number] => 13243227
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/243227 | Dual panel type organic electroluminescent display device and method fabricating the same | Sep 22, 2011 | Issued |
Array
(
[id] => 8232717
[patent_doc_number] => 08198157
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-06-12
[patent_title] => 'Methods of forming non-volatile memory devices including dummy word lines'
[patent_app_type] => utility
[patent_app_number] => 13/236913
[patent_app_country] => US
[patent_app_date] => 2011-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 22
[patent_no_of_words] => 16375
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 272
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/198/08198157.pdf
[firstpage_image] =>[orig_patent_app_number] => 13236913
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/236913 | Methods of forming non-volatile memory devices including dummy word lines | Sep 19, 2011 | Issued |
Array
(
[id] => 9047276
[patent_doc_number] => 08541829
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-09-24
[patent_title] => 'Nonvolatile semiconductor memory and fabrication method for the same'
[patent_app_type] => utility
[patent_app_number] => 13/235948
[patent_app_country] => US
[patent_app_date] => 2011-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 80
[patent_figures_cnt] => 160
[patent_no_of_words] => 26697
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 350
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13235948
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/235948 | Nonvolatile semiconductor memory and fabrication method for the same | Sep 18, 2011 | Issued |
Array
(
[id] => 7791093
[patent_doc_number] => 20120052649
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-03-01
[patent_title] => 'BISTABLE NANOSWITCH'
[patent_app_type] => utility
[patent_app_number] => 13/228701
[patent_app_country] => US
[patent_app_date] => 2011-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 5371
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0052/20120052649.pdf
[firstpage_image] =>[orig_patent_app_number] => 13228701
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/228701 | Bistable nanoswitch | Sep 8, 2011 | Issued |
Array
(
[id] => 8509791
[patent_doc_number] => 20120309199
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-12-06
[patent_title] => 'MANUFACTURING METHOD FOR DUAL DAMASCENE STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 13/218458
[patent_app_country] => US
[patent_app_date] => 2011-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 6232
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13218458
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/218458 | Manufacturing method for dual damascene structure | Aug 25, 2011 | Issued |
Array
(
[id] => 9273424
[patent_doc_number] => 08637355
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-01-28
[patent_title] => 'Actuating transistor including single layer reentrant profile'
[patent_app_type] => utility
[patent_app_number] => 13/218487
[patent_app_country] => US
[patent_app_date] => 2011-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 4945
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13218487
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/218487 | Actuating transistor including single layer reentrant profile | Aug 25, 2011 | Issued |
Array
(
[id] => 8684525
[patent_doc_number] => 20130052809
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-02-28
[patent_title] => 'PRE-CLEAN METHOD FOR EPITAXIAL DEPOSITION AND APPLICATIONS THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/217368
[patent_app_country] => US
[patent_app_date] => 2011-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2493
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13217368
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/217368 | PRE-CLEAN METHOD FOR EPITAXIAL DEPOSITION AND APPLICATIONS THEREOF | Aug 24, 2011 | Abandoned |
Array
(
[id] => 9676827
[patent_doc_number] => 08815736
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-08-26
[patent_title] => 'Methods of forming metal silicide regions on semiconductor devices using different temperatures'
[patent_app_type] => utility
[patent_app_number] => 13/218089
[patent_app_country] => US
[patent_app_date] => 2011-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 13
[patent_no_of_words] => 4185
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13218089
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/218089 | Methods of forming metal silicide regions on semiconductor devices using different temperatures | Aug 24, 2011 | Issued |