
Daniel A. Hess
Examiner (ID: 9166, Phone: (571)272-2392 , Office: P/2876 )
| Most Active Art Unit | 2876 |
| Art Unit(s) | 2876 |
| Total Applications | 2022 |
| Issued Applications | 1569 |
| Pending Applications | 141 |
| Abandoned Applications | 348 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 13951453
[patent_doc_number] => 10211511
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-02-19
[patent_title] => Terahertz detector using field-effect transistor
[patent_app_type] => utility
[patent_app_number] => 15/537064
[patent_app_country] => US
[patent_app_date] => 2015-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2138
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15537064
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/537064 | Terahertz detector using field-effect transistor | Jan 22, 2015 | Issued |
Array
(
[id] => 10270385
[patent_doc_number] => 20150155382
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-06-04
[patent_title] => 'Well Implant Through Dummy Gate Oxide In Gate-Last Process'
[patent_app_type] => utility
[patent_app_number] => 14/600847
[patent_app_country] => US
[patent_app_date] => 2015-01-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6566
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14600847
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/600847 | Well implant through dummy gate oxide in gate-last process | Jan 19, 2015 | Issued |
Array
(
[id] => 12990223
[patent_doc_number] => 20170345817
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-11-30
[patent_title] => SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREFOR AND SEMICONDUCTOR MODULE
[patent_app_type] => utility
[patent_app_number] => 15/536353
[patent_app_country] => US
[patent_app_date] => 2015-01-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7871
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15536353
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/536353 | Semiconductor device, manufacturing method therefor and semiconductor module | Jan 12, 2015 | Issued |
Array
(
[id] => 10241025
[patent_doc_number] => 20150126020
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-05-07
[patent_title] => 'METHOD TO IMPROVE RELIABILITY OF REPLACEMENT GATE DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/595756
[patent_app_country] => US
[patent_app_date] => 2015-01-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3620
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14595756
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/595756 | Method to improve reliability of replacement gate device | Jan 12, 2015 | Issued |
Array
(
[id] => 10241012
[patent_doc_number] => 20150126007
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-05-07
[patent_title] => 'Methods of Manufacturing Three-Dimensional Semiconductor Memory Devices'
[patent_app_type] => utility
[patent_app_number] => 14/593221
[patent_app_country] => US
[patent_app_date] => 2015-01-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 13948
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14593221
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/593221 | Methods of manufacturing three-dimensional semiconductor memory devices | Jan 8, 2015 | Issued |
Array
(
[id] => 11781720
[patent_doc_number] => 09390918
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-07-12
[patent_title] => 'Manufacturing method of semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 14/591043
[patent_app_country] => US
[patent_app_date] => 2015-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 46
[patent_no_of_words] => 27155
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14591043
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/591043 | Manufacturing method of semiconductor device | Jan 6, 2015 | Issued |
Array
(
[id] => 10079810
[patent_doc_number] => 09117662
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-08-25
[patent_title] => 'Method for manufacturing semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 14/578578
[patent_app_country] => US
[patent_app_date] => 2014-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 57
[patent_no_of_words] => 32120
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14578578
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/578578 | Method for manufacturing semiconductor device | Dec 21, 2014 | Issued |
Array
(
[id] => 10732926
[patent_doc_number] => 20160079076
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-03-17
[patent_title] => 'PATTERN FORMING METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD'
[patent_app_type] => utility
[patent_app_number] => 14/573057
[patent_app_country] => US
[patent_app_date] => 2014-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5707
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14573057
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/573057 | PATTERN FORMING METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD | Dec 16, 2014 | Abandoned |
Array
(
[id] => 12457887
[patent_doc_number] => 09985168
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-05-29
[patent_title] => Group III nitride based LED structures including multiple quantum wells with barrier-well unit interface layers
[patent_app_type] => utility
[patent_app_number] => 14/546524
[patent_app_country] => US
[patent_app_date] => 2014-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 20
[patent_no_of_words] => 18098
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14546524
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/546524 | Group III nitride based LED structures including multiple quantum wells with barrier-well unit interface layers | Nov 17, 2014 | Issued |
Array
(
[id] => 10479430
[patent_doc_number] => 20150364447
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-17
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/543512
[patent_app_country] => US
[patent_app_date] => 2014-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 7374
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14543512
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/543512 | Semiconductor device | Nov 16, 2014 | Issued |
Array
(
[id] => 10145210
[patent_doc_number] => 09178025
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-11-03
[patent_title] => 'Low-resistance electrode design'
[patent_app_type] => utility
[patent_app_number] => 14/499652
[patent_app_country] => US
[patent_app_date] => 2014-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 6118
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14499652
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/499652 | Low-resistance electrode design | Sep 28, 2014 | Issued |
Array
(
[id] => 10199127
[patent_doc_number] => 20150084113
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-03-26
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/483280
[patent_app_country] => US
[patent_app_date] => 2014-09-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 16935
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14483280
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/483280 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME | Sep 10, 2014 | Abandoned |
Array
(
[id] => 10145051
[patent_doc_number] => 09177864
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-11-03
[patent_title] => 'Method of coating water soluble mask for laser scribing and plasma etch'
[patent_app_type] => utility
[patent_app_number] => 14/478354
[patent_app_country] => US
[patent_app_date] => 2014-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 21
[patent_no_of_words] => 9876
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14478354
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/478354 | Method of coating water soluble mask for laser scribing and plasma etch | Sep 4, 2014 | Issued |
Array
(
[id] => 10255730
[patent_doc_number] => 20150140727
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-05-21
[patent_title] => 'METHOD FOR FORMING CONDUCTIVE ELECTRODE PATTERNS AND METHOD FOR MANUFACTURING SOLAR CELLS COMPRISING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/476010
[patent_app_country] => US
[patent_app_date] => 2014-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5341
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14476010
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/476010 | Method for forming conductive electrode patterns and method for manufacturing solar cells comprising the same | Sep 2, 2014 | Issued |
Array
(
[id] => 10943625
[patent_doc_number] => 20140346646
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-11-27
[patent_title] => 'STRUCTURES WITH THROUGH VIAS PASSING THROUGH A SUBSTRATE COMPRISING A PLANAR INSULATING LAYER BETWEEN SEMICONDUCTOR LAYERS'
[patent_app_type] => utility
[patent_app_number] => 14/456726
[patent_app_country] => US
[patent_app_date] => 2014-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 5818
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14456726
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/456726 | Structures with through vias passing through a substrate comprising a planar insulating layer between semiconductor layers | Aug 10, 2014 | Issued |
Array
(
[id] => 10155560
[patent_doc_number] => 09187315
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-11-17
[patent_title] => 'Method for manufacturing semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 14/449633
[patent_app_country] => US
[patent_app_date] => 2014-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 34
[patent_no_of_words] => 11896
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14449633
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/449633 | Method for manufacturing semiconductor device | Jul 31, 2014 | Issued |
Array
(
[id] => 10680701
[patent_doc_number] => 20160026846
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-01-28
[patent_title] => 'Flexible fingerprint sensor materials and processes'
[patent_app_type] => utility
[patent_app_number] => 14/121023
[patent_app_country] => US
[patent_app_date] => 2014-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 10810
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14121023
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/121023 | Flexible fingerprint sensor materials and processes | Jul 21, 2014 | Issued |
Array
(
[id] => 9768442
[patent_doc_number] => 20140292104
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-10-02
[patent_title] => 'ON-CHIP CAPACITORS WITH A VARIABLE CAPACITANCE FOR A RADIOFREQUENCY INTEGRATED CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 14/302748
[patent_app_country] => US
[patent_app_date] => 2014-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 8140
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14302748
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/302748 | On-chip capacitors with a variable capacitance for a radiofrequency integrated circuit | Jun 11, 2014 | Issued |
Array
(
[id] => 10022552
[patent_doc_number] => 09065047
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-06-23
[patent_title] => 'Mixed valent oxide memory and method'
[patent_app_type] => utility
[patent_app_number] => 14/277221
[patent_app_country] => US
[patent_app_date] => 2014-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 2614
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14277221
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/277221 | Mixed valent oxide memory and method | May 13, 2014 | Issued |
Array
(
[id] => 10502563
[patent_doc_number] => 09230966
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-01-05
[patent_title] => 'Capacitor and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 14/249340
[patent_app_country] => US
[patent_app_date] => 2014-04-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 4048
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14249340
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/249340 | Capacitor and method of manufacturing the same | Apr 8, 2014 | Issued |