Search

Daniel A. Hess

Examiner (ID: 9166, Phone: (571)272-2392 , Office: P/2876 )

Most Active Art Unit
2876
Art Unit(s)
2876
Total Applications
2022
Issued Applications
1569
Pending Applications
141
Abandoned Applications
348

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7818062 [patent_doc_number] => 20120064682 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-15 [patent_title] => 'Methods of Manufacturing Three-Dimensional Semiconductor Memory Devices' [patent_app_type] => utility [patent_app_number] => 13/230447 [patent_app_country] => US [patent_app_date] => 2011-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 13976 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0064/20120064682.pdf [firstpage_image] =>[orig_patent_app_number] => 13230447 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/230447
Methods of Manufacturing Three-Dimensional Semiconductor Memory Devices Sep 11, 2011 Abandoned
Array ( [id] => 7818090 [patent_doc_number] => 20120064710 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-15 [patent_title] => 'METHOD OF MANUFACTURING NONVOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/230228 [patent_app_country] => US [patent_app_date] => 2011-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 13763 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0064/20120064710.pdf [firstpage_image] =>[orig_patent_app_number] => 13230228 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/230228
Method of manufacturing nonvolatile memory device Sep 11, 2011 Issued
Array ( [id] => 8516316 [patent_doc_number] => 20120315724 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-13 [patent_title] => 'METHOD AND APPARATUS FOR DEPOSITION OF SELENIUM THIN-FILM AND PLASMA HEAD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/230788 [patent_app_country] => US [patent_app_date] => 2011-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 2994 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13230788 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/230788
METHOD AND APPARATUS FOR DEPOSITION OF SELENIUM THIN-FILM AND PLASMA HEAD THEREOF Sep 11, 2011 Abandoned
Array ( [id] => 9504215 [patent_doc_number] => 08742532 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-03 [patent_title] => 'Dopant applicator system and method of applying vaporized doping compositions to PV solar wafers' [patent_app_type] => utility [patent_app_number] => 13/230481 [patent_app_country] => US [patent_app_date] => 2011-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 12939 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13230481 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/230481
Dopant applicator system and method of applying vaporized doping compositions to PV solar wafers Sep 11, 2011 Issued
Array ( [id] => 8846117 [patent_doc_number] => 08455296 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-04 [patent_title] => 'Semiconductor processing' [patent_app_type] => utility [patent_app_number] => 13/190879 [patent_app_country] => US [patent_app_date] => 2011-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4421 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13190879 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/190879
Semiconductor processing Jul 25, 2011 Issued
Array ( [id] => 8610239 [patent_doc_number] => 20130015551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-17 [patent_title] => 'METHOD FOR FABRICATING MEMORY DEVICE WITH BURIED DIGIT LINES AND BURIED WORD LINES' [patent_app_type] => utility [patent_app_number] => 13/182450 [patent_app_country] => US [patent_app_date] => 2011-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2668 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13182450 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/182450
Method for fabricating memory device with buried digit lines and buried word lines Jul 13, 2011 Issued
Array ( [id] => 7732643 [patent_doc_number] => 20120015513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-19 [patent_title] => 'METHOD FOR FABRICATING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/182124 [patent_app_country] => US [patent_app_date] => 2011-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4529 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20120015513.pdf [firstpage_image] =>[orig_patent_app_number] => 13182124 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/182124
Method for fabricating semiconductor device Jul 12, 2011 Issued
Array ( [id] => 7732603 [patent_doc_number] => 20120015489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-19 [patent_title] => 'METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES' [patent_app_type] => utility [patent_app_number] => 13/181907 [patent_app_country] => US [patent_app_date] => 2011-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5524 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20120015489.pdf [firstpage_image] =>[orig_patent_app_number] => 13181907 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/181907
Methods of manufacturing semiconductor devices Jul 12, 2011 Issued
Array ( [id] => 8313142 [patent_doc_number] => 20120190169 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-26 [patent_title] => 'METHOD FOR FABRICATING DEEP TRENCH ISOLATION' [patent_app_type] => utility [patent_app_number] => 13/181689 [patent_app_country] => US [patent_app_date] => 2011-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2397 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13181689 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/181689
Method for fabricating deep trench isolation Jul 12, 2011 Issued
Array ( [id] => 8612362 [patent_doc_number] => 20130017674 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-17 [patent_title] => 'CRYOGENIC SILICON ION-IMPLANTATION AND RECRYSTALLIZATION ANNEALING' [patent_app_type] => utility [patent_app_number] => 13/181935 [patent_app_country] => US [patent_app_date] => 2011-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4445 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13181935 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/181935
CRYOGENIC SILICON ION-IMPLANTATION AND RECRYSTALLIZATION ANNEALING Jul 12, 2011 Abandoned
Array ( [id] => 8612354 [patent_doc_number] => 20130017666 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-17 [patent_title] => 'METHOD OF FORMING ISOLATION STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/181639 [patent_app_country] => US [patent_app_date] => 2011-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2382 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13181639 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/181639
METHOD OF FORMING ISOLATION STRUCTURE Jul 12, 2011 Abandoned
Array ( [id] => 7743545 [patent_doc_number] => 20120021611 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-26 [patent_title] => 'COATING TREATMENT METHOD, NON-TRANSITORY COMPUTER STORAGE MEDIUM AND COATING TREATMENT APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/181565 [patent_app_country] => US [patent_app_date] => 2011-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9260 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0021/20120021611.pdf [firstpage_image] =>[orig_patent_app_number] => 13181565 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/181565
Coating treatment method, non-transitory computer storage medium and coating treatment apparatus Jul 12, 2011 Issued
Array ( [id] => 7732574 [patent_doc_number] => 20120015471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-19 [patent_title] => 'MULTIPLE-PATH LASER EDGE DELETE PROCESS FOR THIN-FILM SOLAR MODULES' [patent_app_type] => utility [patent_app_number] => 13/181401 [patent_app_country] => US [patent_app_date] => 2011-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7002 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20120015471.pdf [firstpage_image] =>[orig_patent_app_number] => 13181401 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/181401
MULTIPLE-PATH LASER EDGE DELETE PROCESS FOR THIN-FILM SOLAR MODULES Jul 11, 2011 Abandoned
Array ( [id] => 9046747 [patent_doc_number] => 08541301 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-24 [patent_title] => 'Reduction of pore fill material dewetting' [patent_app_type] => utility [patent_app_number] => 13/180734 [patent_app_country] => US [patent_app_date] => 2011-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 8514 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13180734 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/180734
Reduction of pore fill material dewetting Jul 11, 2011 Issued
Array ( [id] => 11904304 [patent_doc_number] => 09773744 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-26 [patent_title] => 'Solder bump cleaning before reflow' [patent_app_type] => utility [patent_app_number] => 13/181111 [patent_app_country] => US [patent_app_date] => 2011-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 4989 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13181111 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/181111
Solder bump cleaning before reflow Jul 11, 2011 Issued
Array ( [id] => 7720430 [patent_doc_number] => 20120009765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'COMPARTMENTALIZED CHAMBER' [patent_app_type] => utility [patent_app_number] => 13/181451 [patent_app_country] => US [patent_app_date] => 2011-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7824 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20120009765.pdf [firstpage_image] =>[orig_patent_app_number] => 13181451 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/181451
COMPARTMENTALIZED CHAMBER Jul 11, 2011 Abandoned
Array ( [id] => 8896609 [patent_doc_number] => 08476130 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-02 [patent_title] => 'Semiconductor device and method of fabricating semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/180613 [patent_app_country] => US [patent_app_date] => 2011-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 5386 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13180613 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/180613
Semiconductor device and method of fabricating semiconductor device Jul 11, 2011 Issued
Array ( [id] => 8610216 [patent_doc_number] => 20130015528 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-17 [patent_title] => 'METHOD AND SYSTEM FOR FORMING LOW CONTACT RESISTANCE DEVICE' [patent_app_type] => utility [patent_app_number] => 13/181175 [patent_app_country] => US [patent_app_date] => 2011-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 5080 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13181175 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/181175
Method and system for forming low contact resistance device Jul 11, 2011 Issued
Array ( [id] => 7767202 [patent_doc_number] => 20120034734 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-09 [patent_title] => 'SYSTEM AND METHOD FOR FABRICATING THIN-FILM PHOTOVOLTAIC DEVICES' [patent_app_type] => utility [patent_app_number] => 13/180693 [patent_app_country] => US [patent_app_date] => 2011-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8265 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20120034734.pdf [firstpage_image] =>[orig_patent_app_number] => 13180693 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/180693
SYSTEM AND METHOD FOR FABRICATING THIN-FILM PHOTOVOLTAIC DEVICES Jul 11, 2011 Abandoned
Array ( [id] => 8784588 [patent_doc_number] => 08431431 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-30 [patent_title] => 'Structures with through vias passing through a substrate comprising a planar insulating layer between semiconductor layers' [patent_app_type] => utility [patent_app_number] => 13/181006 [patent_app_country] => US [patent_app_date] => 2011-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 21 [patent_no_of_words] => 5751 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13181006 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/181006
Structures with through vias passing through a substrate comprising a planar insulating layer between semiconductor layers Jul 11, 2011 Issued
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