Search

Daniel A. Hess

Examiner (ID: 9166, Phone: (571)272-2392 , Office: P/2876 )

Most Active Art Unit
2876
Art Unit(s)
2876
Total Applications
2022
Issued Applications
1569
Pending Applications
141
Abandoned Applications
348

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6273830 [patent_doc_number] => 20100255653 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-07 [patent_title] => 'SEMICONDUCTOR PROCESSING' [patent_app_type] => utility [patent_app_number] => 12/419779 [patent_app_country] => US [patent_app_date] => 2009-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4388 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20100255653.pdf [firstpage_image] =>[orig_patent_app_number] => 12419779 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/419779
Semiconductor processing Apr 6, 2009 Issued
Array ( [id] => 4492553 [patent_doc_number] => 07955873 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-07 [patent_title] => 'Method of fabricating a semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/415757 [patent_app_country] => US [patent_app_date] => 2009-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5528 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/955/07955873.pdf [firstpage_image] =>[orig_patent_app_number] => 12415757 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/415757
Method of fabricating a semiconductor device Mar 30, 2009 Issued
Array ( [id] => 6230445 [patent_doc_number] => 20100184249 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-22 [patent_title] => 'Continuous deposition process and apparatus for manufacturing cadmium telluride photovoltaic devices' [patent_app_type] => utility [patent_app_number] => 12/383747 [patent_app_country] => US [patent_app_date] => 2009-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12614 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20100184249.pdf [firstpage_image] =>[orig_patent_app_number] => 12383747 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/383747
Continuous deposition process and apparatus for manufacturing cadmium telluride photovoltaic devices Mar 27, 2009 Issued
Array ( [id] => 4599323 [patent_doc_number] => 07977140 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-07-12 [patent_title] => 'Methods for producing solid-state imaging device and electronic device' [patent_app_type] => utility [patent_app_number] => 12/382713 [patent_app_country] => US [patent_app_date] => 2009-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 50 [patent_no_of_words] => 11165 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/977/07977140.pdf [firstpage_image] =>[orig_patent_app_number] => 12382713 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/382713
Methods for producing solid-state imaging device and electronic device Mar 22, 2009 Issued
Array ( [id] => 23609 [patent_doc_number] => 07795108 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-14 [patent_title] => 'Resistance-based etch depth determination for SGT technology' [patent_app_type] => utility [patent_app_number] => 12/399632 [patent_app_country] => US [patent_app_date] => 2009-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2461 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/795/07795108.pdf [firstpage_image] =>[orig_patent_app_number] => 12399632 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/399632
Resistance-based etch depth determination for SGT technology Mar 5, 2009 Issued
Array ( [id] => 5385856 [patent_doc_number] => 20090227101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-10 [patent_title] => 'METHOD OF FORMING WIRING LAYER OF SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/396632 [patent_app_country] => US [patent_app_date] => 2009-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8455 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20090227101.pdf [firstpage_image] =>[orig_patent_app_number] => 12396632 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/396632
Method of forming wiring layer of semiconductor device Mar 2, 2009 Issued
Array ( [id] => 6185422 [patent_doc_number] => 20110124183 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-26 [patent_title] => 'METHOD FOR MANUFACTURING FLEXIBLE SEMICONDUCTOR SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 12/918412 [patent_app_country] => US [patent_app_date] => 2009-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6198 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20110124183.pdf [firstpage_image] =>[orig_patent_app_number] => 12918412 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/918412
Method for manufacturing flexible semiconductor substrate Feb 12, 2009 Issued
Array ( [id] => 4444680 [patent_doc_number] => 07863182 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-04 [patent_title] => 'Dicing die-bonding film' [patent_app_type] => utility [patent_app_number] => 12/370049 [patent_app_country] => US [patent_app_date] => 2009-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 10538 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/863/07863182.pdf [firstpage_image] =>[orig_patent_app_number] => 12370049 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/370049
Dicing die-bonding film Feb 11, 2009 Issued
Array ( [id] => 9413508 [patent_doc_number] => 08697545 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-15 [patent_title] => 'Direct contact heat control of micro structures' [patent_app_type] => utility [patent_app_number] => 12/810883 [patent_app_country] => US [patent_app_date] => 2008-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8571 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12810883 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/810883
Direct contact heat control of micro structures Dec 28, 2008 Issued
Array ( [id] => 4564599 [patent_doc_number] => 07846810 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-07 [patent_title] => 'Method of measuring warpage of rear surface of substrate' [patent_app_type] => utility [patent_app_number] => 12/341082 [patent_app_country] => US [patent_app_date] => 2008-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 12313 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/846/07846810.pdf [firstpage_image] =>[orig_patent_app_number] => 12341082 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/341082
Method of measuring warpage of rear surface of substrate Dec 21, 2008 Issued
Array ( [id] => 4551683 [patent_doc_number] => 07820521 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-26 [patent_title] => 'Conductive through via structure and process for electronic device carriers' [patent_app_type] => utility [patent_app_number] => 12/335605 [patent_app_country] => US [patent_app_date] => 2008-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 64 [patent_no_of_words] => 5722 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/820/07820521.pdf [firstpage_image] =>[orig_patent_app_number] => 12335605 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/335605
Conductive through via structure and process for electronic device carriers Dec 15, 2008 Issued
Array ( [id] => 5284993 [patent_doc_number] => 20090098668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-16 [patent_title] => 'Method and Apparatus to Facilitate Testing of Printed Semiconductor Devices' [patent_app_type] => utility [patent_app_number] => 12/270544 [patent_app_country] => US [patent_app_date] => 2008-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4311 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20090098668.pdf [firstpage_image] =>[orig_patent_app_number] => 12270544 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/270544
Method and Apparatus to Facilitate Testing of Printed Semiconductor Devices Nov 12, 2008 Abandoned
Array ( [id] => 6089441 [patent_doc_number] => 20110217814 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-08 [patent_title] => 'METHOD FOR SINGULATING ELECTRONIC COMPONENTS FROM A SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 13/125502 [patent_app_country] => US [patent_app_date] => 2008-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4238 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0217/20110217814.pdf [firstpage_image] =>[orig_patent_app_number] => 13125502 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/125502
Method for singulating electronic components from a substrate Oct 22, 2008 Issued
Array ( [id] => 6487089 [patent_doc_number] => 20100093116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-15 [patent_title] => 'DIMENSION PROFILING OF SIC DEVICES' [patent_app_type] => utility [patent_app_number] => 12/251341 [patent_app_country] => US [patent_app_date] => 2008-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5545 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20100093116.pdf [firstpage_image] =>[orig_patent_app_number] => 12251341 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/251341
Dimension profiling of SiC devices Oct 13, 2008 Issued
Array ( [id] => 5278689 [patent_doc_number] => 20090130821 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-21 [patent_title] => 'THREE DIMENSIONAL PACKAGING WITH WAFER-LEVEL BONDING AND CHIP-LEVEL REPAIR' [patent_app_type] => utility [patent_app_number] => 12/249812 [patent_app_country] => US [patent_app_date] => 2008-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5716 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0130/20090130821.pdf [firstpage_image] =>[orig_patent_app_number] => 12249812 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/249812
THREE DIMENSIONAL PACKAGING WITH WAFER-LEVEL BONDING AND CHIP-LEVEL REPAIR Oct 9, 2008 Abandoned
Array ( [id] => 4483775 [patent_doc_number] => 07902040 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-03-08 [patent_title] => 'Dual-sided substrate measurement apparatus and methods' [patent_app_type] => utility [patent_app_number] => 12/286762 [patent_app_country] => US [patent_app_date] => 2008-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 7590 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/902/07902040.pdf [firstpage_image] =>[orig_patent_app_number] => 12286762 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/286762
Dual-sided substrate measurement apparatus and methods Oct 1, 2008 Issued
Array ( [id] => 4483335 [patent_doc_number] => 07901953 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-08 [patent_title] => 'Methods and apparatus for detecting defects in interconnect structures' [patent_app_type] => utility [patent_app_number] => 12/205871 [patent_app_country] => US [patent_app_date] => 2008-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2272 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/901/07901953.pdf [firstpage_image] =>[orig_patent_app_number] => 12205871 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/205871
Methods and apparatus for detecting defects in interconnect structures Sep 5, 2008 Issued
Array ( [id] => 8807731 [patent_doc_number] => 08445383 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-21 [patent_title] => 'Transparent nanocrystalline diamond contacts to wide bandgap semiconductor devices' [patent_app_type] => utility [patent_app_number] => 12/205652 [patent_app_country] => US [patent_app_date] => 2008-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4485 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12205652 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/205652
Transparent nanocrystalline diamond contacts to wide bandgap semiconductor devices Sep 4, 2008 Issued
Array ( [id] => 5449786 [patent_doc_number] => 20090065822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-12 [patent_title] => 'Image Sensor and Method for Manufacturing an Image Sensor' [patent_app_type] => utility [patent_app_number] => 12/204831 [patent_app_country] => US [patent_app_date] => 2008-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4284 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0065/20090065822.pdf [firstpage_image] =>[orig_patent_app_number] => 12204831 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/204831
Image sensor and method for manufacturing an image sensor Sep 4, 2008 Issued
Array ( [id] => 11259546 [patent_doc_number] => 09484451 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-01 [patent_title] => 'MOSFET active area and edge termination area charge balance' [patent_app_type] => utility [patent_app_number] => 12/203846 [patent_app_country] => US [patent_app_date] => 2008-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 4354 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12203846 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/203846
MOSFET active area and edge termination area charge balance Sep 2, 2008 Issued
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