Search

Daniel A. Hess

Examiner (ID: 9166, Phone: (571)272-2392 , Office: P/2876 )

Most Active Art Unit
2876
Art Unit(s)
2876
Total Applications
2022
Issued Applications
1569
Pending Applications
141
Abandoned Applications
348

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5193978 [patent_doc_number] => 20070082462 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-12 [patent_title] => 'Wafer having indicator for first die and method of attaching die of the wafer' [patent_app_type] => utility [patent_app_number] => 11/542781 [patent_app_country] => US [patent_app_date] => 2006-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3143 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0082/20070082462.pdf [firstpage_image] =>[orig_patent_app_number] => 11542781 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/542781
Wafer having indicator for first die and method of attaching die of the wafer Oct 3, 2006 Abandoned
Array ( [id] => 5076852 [patent_doc_number] => 20070120076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-31 [patent_title] => 'Integrated ionizers for process metrology equipment' [patent_app_type] => utility [patent_app_number] => 11/542401 [patent_app_country] => US [patent_app_date] => 2006-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2336 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20070120076.pdf [firstpage_image] =>[orig_patent_app_number] => 11542401 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/542401
Integrated ionizers for process metrology equipment Oct 2, 2006 Abandoned
Array ( [id] => 4944061 [patent_doc_number] => 20080081386 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-03 [patent_title] => 'Through-die metal vias with a dispersed phase of graphitic structures of carbon for reduced thermal expansion and increased electrical conductance' [patent_app_type] => utility [patent_app_number] => 11/541112 [patent_app_country] => US [patent_app_date] => 2006-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4055 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20080081386.pdf [firstpage_image] =>[orig_patent_app_number] => 11541112 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/541112
Through-die metal vias with a dispersed phase of graphitic structures of carbon for reduced thermal expansion and increased electrical conductance Sep 28, 2006 Issued
Array ( [id] => 5242312 [patent_doc_number] => 20070020807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-25 [patent_title] => 'Protective structures and methods of fabricating protective structures over wafers' [patent_app_type] => utility [patent_app_number] => 11/540412 [patent_app_country] => US [patent_app_date] => 2006-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5548 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20070020807.pdf [firstpage_image] =>[orig_patent_app_number] => 11540412 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/540412
Protective structures and methods of fabricating protective structures over wafers Sep 27, 2006 Abandoned
Array ( [id] => 232705 [patent_doc_number] => 07598130 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-10-06 [patent_title] => 'Method for reducing layout-dependent variations in semiconductor devices' [patent_app_type] => utility [patent_app_number] => 11/529091 [patent_app_country] => US [patent_app_date] => 2006-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 3685 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/598/07598130.pdf [firstpage_image] =>[orig_patent_app_number] => 11529091 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/529091
Method for reducing layout-dependent variations in semiconductor devices Sep 27, 2006 Issued
Array ( [id] => 4476794 [patent_doc_number] => 07906348 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-15 [patent_title] => 'Method of feed forward control of scanned rapid thermal processing' [patent_app_type] => utility [patent_app_number] => 11/532651 [patent_app_country] => US [patent_app_date] => 2006-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4242 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/906/07906348.pdf [firstpage_image] =>[orig_patent_app_number] => 11532651 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/532651
Method of feed forward control of scanned rapid thermal processing Sep 17, 2006 Issued
Array ( [id] => 273843 [patent_doc_number] => 07560007 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-14 [patent_title] => 'In-situ wafer temperature measurement and control' [patent_app_type] => utility [patent_app_number] => 11/519542 [patent_app_country] => US [patent_app_date] => 2006-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 4951 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/560/07560007.pdf [firstpage_image] =>[orig_patent_app_number] => 11519542 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/519542
In-situ wafer temperature measurement and control Sep 10, 2006 Issued
Array ( [id] => 5205060 [patent_doc_number] => 20070026542 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-01 [patent_title] => 'FORMATION OF CONDUCTIVE TEMPLATES EMPLOYING INDIUM TIN OXIDE' [patent_app_type] => utility [patent_app_number] => 11/470829 [patent_app_country] => US [patent_app_date] => 2006-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4903 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20070026542.pdf [firstpage_image] =>[orig_patent_app_number] => 11470829 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/470829
Formation of conductive templates employing indium tin oxide Sep 6, 2006 Issued
Array ( [id] => 5688373 [patent_doc_number] => 20060286688 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-21 [patent_title] => 'Integrated circuitry and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/467769 [patent_app_country] => US [patent_app_date] => 2006-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 10387 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0286/20060286688.pdf [firstpage_image] =>[orig_patent_app_number] => 11467769 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/467769
Integrated circuitry and method for manufacturing the same Aug 27, 2006 Issued
Array ( [id] => 296015 [patent_doc_number] => 07541285 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-02 [patent_title] => 'Substrate processing apparatus and substrate processing method' [patent_app_type] => utility [patent_app_number] => 11/464622 [patent_app_country] => US [patent_app_date] => 2006-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4482 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/541/07541285.pdf [firstpage_image] =>[orig_patent_app_number] => 11464622 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/464622
Substrate processing apparatus and substrate processing method Aug 14, 2006 Issued
Array ( [id] => 5599662 [patent_doc_number] => 20060290007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-28 [patent_title] => 'Flip Chip Die Assembly Using Thin Flexible Substrates' [patent_app_type] => utility [patent_app_number] => 11/464779 [patent_app_country] => US [patent_app_date] => 2006-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3447 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0290/20060290007.pdf [firstpage_image] =>[orig_patent_app_number] => 11464779 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/464779
Flip chip die assembly using thin flexible substrates Aug 14, 2006 Issued
Array ( [id] => 5625411 [patent_doc_number] => 20060263916 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-23 [patent_title] => 'Infrared thermopile detector system for semiconductor process monitoring and control' [patent_app_type] => utility [patent_app_number] => 11/494193 [patent_app_country] => US [patent_app_date] => 2006-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5258 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0263/20060263916.pdf [firstpage_image] =>[orig_patent_app_number] => 11494193 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/494193
Infrared thermopile detector system for semiconductor process monitoring and control Jul 26, 2006 Abandoned
Array ( [id] => 7692101 [patent_doc_number] => 20070231932 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-04 [patent_title] => 'Method of revealing crystalline defects in a bulk substrate' [patent_app_type] => utility [patent_app_number] => 11/481691 [patent_app_country] => US [patent_app_date] => 2006-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 4716 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20070231932.pdf [firstpage_image] =>[orig_patent_app_number] => 11481691 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/481691
Method of revealing crystalline defects in a bulk substrate Jul 4, 2006 Issued
Array ( [id] => 820492 [patent_doc_number] => 07407823 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-05 [patent_title] => 'Manufacturing method of semiconductor integrated circuit device' [patent_app_type] => utility [patent_app_number] => 11/471712 [patent_app_country] => US [patent_app_date] => 2006-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 50 [patent_no_of_words] => 18413 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/407/07407823.pdf [firstpage_image] =>[orig_patent_app_number] => 11471712 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/471712
Manufacturing method of semiconductor integrated circuit device Jun 20, 2006 Issued
Array ( [id] => 5051439 [patent_doc_number] => 20070031984 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-08 [patent_title] => 'Method of fabricating submicron suspended objects and application to the mechanical characterization of said objects' [patent_app_type] => utility [patent_app_number] => 11/454151 [patent_app_country] => US [patent_app_date] => 2006-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3671 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20070031984.pdf [firstpage_image] =>[orig_patent_app_number] => 11454151 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/454151
Method of fabricating submicron suspended objects and application to the mechanical characterization of said objects Jun 14, 2006 Issued
Array ( [id] => 5532533 [patent_doc_number] => 20090232321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-17 [patent_title] => 'ACOUSTIC SIGNAL PROCESSING APPARATUS, ACOUSTIC SIGNAL PROCESSING METHOD, ACOUSTIC SIGNAL PROCESSING PROGRAM, AND COMPUTER READABLE RECORDING MEDIUM' [patent_app_type] => utility [patent_app_number] => 11/994067 [patent_app_country] => US [patent_app_date] => 2006-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4711 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0232/20090232321.pdf [firstpage_image] =>[orig_patent_app_number] => 11994067 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/994067
Audio signal processing apparatus, audio signal processing method, audio signal processing program, and computer-readable recording medium Jun 13, 2006 Issued
Array ( [id] => 303493 [patent_doc_number] => 07534629 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-19 [patent_title] => 'Manufacturing method of semiconductor integrated circuit device' [patent_app_type] => utility [patent_app_number] => 11/448071 [patent_app_country] => US [patent_app_date] => 2006-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 41 [patent_no_of_words] => 17860 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 533 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/534/07534629.pdf [firstpage_image] =>[orig_patent_app_number] => 11448071 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/448071
Manufacturing method of semiconductor integrated circuit device Jun 6, 2006 Issued
Array ( [id] => 307396 [patent_doc_number] => 07531462 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-12 [patent_title] => 'Method of inspecting semiconductor wafer' [patent_app_type] => utility [patent_app_number] => 11/444301 [patent_app_country] => US [patent_app_date] => 2006-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 5788 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/531/07531462.pdf [firstpage_image] =>[orig_patent_app_number] => 11444301 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/444301
Method of inspecting semiconductor wafer May 31, 2006 Issued
Array ( [id] => 170472 [patent_doc_number] => 07662649 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-16 [patent_title] => 'Methods for assessing alignments of substrates within deposition apparatuses; and methods for assessing thicknesses of deposited layers within deposition apparatuses' [patent_app_type] => utility [patent_app_number] => 11/445032 [patent_app_country] => US [patent_app_date] => 2006-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 17 [patent_no_of_words] => 6694 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/662/07662649.pdf [firstpage_image] =>[orig_patent_app_number] => 11445032 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/445032
Methods for assessing alignments of substrates within deposition apparatuses; and methods for assessing thicknesses of deposited layers within deposition apparatuses May 30, 2006 Issued
Array ( [id] => 5242287 [patent_doc_number] => 20070020782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-25 [patent_title] => 'Method of monitoring a semiconductor manufacturing trend' [patent_app_type] => utility [patent_app_number] => 11/443241 [patent_app_country] => US [patent_app_date] => 2006-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7201 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20070020782.pdf [firstpage_image] =>[orig_patent_app_number] => 11443241 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/443241
Method of monitoring a semiconductor manufacturing trend May 29, 2006 Issued
Menu