Search

Daniel A. Hess

Examiner (ID: 9166, Phone: (571)272-2392 , Office: P/2876 )

Most Active Art Unit
2876
Art Unit(s)
2876
Total Applications
2022
Issued Applications
1569
Pending Applications
141
Abandoned Applications
348

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5625433 [patent_doc_number] => 20060263938 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-23 [patent_title] => 'Stacked module systems and method' [patent_app_type] => utility [patent_app_number] => 11/411185 [patent_app_country] => US [patent_app_date] => 2006-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1722 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0263/20060263938.pdf [firstpage_image] =>[orig_patent_app_number] => 11411185 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/411185
Stacked module systems and method Apr 24, 2006 Issued
Array ( [id] => 5619477 [patent_doc_number] => 20060189011 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-24 [patent_title] => 'Semiconductor device and control method' [patent_app_type] => utility [patent_app_number] => 11/409208 [patent_app_country] => US [patent_app_date] => 2006-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 5402 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20060189011.pdf [firstpage_image] =>[orig_patent_app_number] => 11409208 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/409208
Semiconductor device and control method Apr 23, 2006 Abandoned
Array ( [id] => 5694255 [patent_doc_number] => 20060154402 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-13 [patent_title] => 'TILE-BASED ROUTING METHOD OF A MULTI-LAYER CIRCUIT BOARD AND RELATED STRUCTURE' [patent_app_type] => utility [patent_app_number] => 11/277042 [patent_app_country] => US [patent_app_date] => 2006-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5536 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20060154402.pdf [firstpage_image] =>[orig_patent_app_number] => 11277042 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/277042
Tile-based routing method of a multi-layer circuit board and related structure Mar 20, 2006 Issued
Array ( [id] => 5242307 [patent_doc_number] => 20070020802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-25 [patent_title] => 'Packaging method for segregating die paddles of a leadfram' [patent_app_type] => utility [patent_app_number] => 11/357952 [patent_app_country] => US [patent_app_date] => 2006-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 3395 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20070020802.pdf [firstpage_image] =>[orig_patent_app_number] => 11357952 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/357952
Packaging method for segregating die paddles of a leadframe Feb 21, 2006 Issued
Array ( [id] => 5680953 [patent_doc_number] => 20060197220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-07 [patent_title] => 'Semiconductor device having a plastic housing and external connections and method for producing the same' [patent_app_type] => utility [patent_app_number] => 11/354391 [patent_app_country] => US [patent_app_date] => 2006-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7523 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20060197220.pdf [firstpage_image] =>[orig_patent_app_number] => 11354391 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/354391
Semiconductor device having a plastic housing and external connections and method for producing the same Feb 14, 2006 Issued
Array ( [id] => 442759 [patent_doc_number] => 07256072 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-14 [patent_title] => 'Semiconductor device, electronic device, electronic apparatus, and method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/346533 [patent_app_country] => US [patent_app_date] => 2006-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 8402 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/256/07256072.pdf [firstpage_image] =>[orig_patent_app_number] => 11346533 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/346533
Semiconductor device, electronic device, electronic apparatus, and method of manufacturing semiconductor device Feb 1, 2006 Issued
Array ( [id] => 5665745 [patent_doc_number] => 20060171095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-03 [patent_title] => 'Method and apparatus for detecting backside particles during wafer processing' [patent_app_type] => utility [patent_app_number] => 11/341835 [patent_app_country] => US [patent_app_date] => 2006-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2944 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20060171095.pdf [firstpage_image] =>[orig_patent_app_number] => 11341835 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/341835
Method and apparatus for detecting backside particles during wafer processing Jan 25, 2006 Issued
Array ( [id] => 5615892 [patent_doc_number] => 20060185424 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-24 [patent_title] => 'Integrated measuring instrument' [patent_app_type] => utility [patent_app_number] => 11/333796 [patent_app_country] => US [patent_app_date] => 2006-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8372 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0185/20060185424.pdf [firstpage_image] =>[orig_patent_app_number] => 11333796 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/333796
Integrated measuring instrument Jan 16, 2006 Abandoned
Array ( [id] => 425065 [patent_doc_number] => 07271047 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-09-18 [patent_title] => 'Test structure and method for measuring the resistance of line-end vias' [patent_app_type] => utility [patent_app_number] => 11/327641 [patent_app_country] => US [patent_app_date] => 2006-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3705 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/271/07271047.pdf [firstpage_image] =>[orig_patent_app_number] => 11327641 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/327641
Test structure and method for measuring the resistance of line-end vias Jan 5, 2006 Issued
Array ( [id] => 448578 [patent_doc_number] => 07250355 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-31 [patent_title] => 'Multilayered circuit substrate, semiconductor device and method of producing same' [patent_app_type] => utility [patent_app_number] => 11/324220 [patent_app_country] => US [patent_app_date] => 2006-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 22 [patent_no_of_words] => 6291 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/250/07250355.pdf [firstpage_image] =>[orig_patent_app_number] => 11324220 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/324220
Multilayered circuit substrate, semiconductor device and method of producing same Jan 3, 2006 Issued
Array ( [id] => 5242305 [patent_doc_number] => 20070020800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-25 [patent_title] => 'IC chip mounting method' [patent_app_type] => utility [patent_app_number] => 11/319652 [patent_app_country] => US [patent_app_date] => 2005-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4165 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20070020800.pdf [firstpage_image] =>[orig_patent_app_number] => 11319652 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/319652
IC chip mounting method Dec 28, 2005 Issued
Array ( [id] => 5652633 [patent_doc_number] => 20060138368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-29 [patent_title] => 'Apparatus and method for inspecting semiconductor wafers for metal residue' [patent_app_type] => utility [patent_app_number] => 11/321091 [patent_app_country] => US [patent_app_date] => 2005-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3558 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0138/20060138368.pdf [firstpage_image] =>[orig_patent_app_number] => 11321091 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/321091
Apparatus and method for inspecting semiconductor wafers for metal residue Dec 27, 2005 Abandoned
Array ( [id] => 352547 [patent_doc_number] => 07491568 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-17 [patent_title] => 'Wafer level package and method for making the same' [patent_app_type] => utility [patent_app_number] => 11/314341 [patent_app_country] => US [patent_app_date] => 2005-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 18 [patent_no_of_words] => 1874 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/491/07491568.pdf [firstpage_image] =>[orig_patent_app_number] => 11314341 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/314341
Wafer level package and method for making the same Dec 21, 2005 Issued
Array ( [id] => 5863278 [patent_doc_number] => 20060097408 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-11 [patent_title] => 'Semiconductor package device and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/315061 [patent_app_country] => US [patent_app_date] => 2005-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2642 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20060097408.pdf [firstpage_image] =>[orig_patent_app_number] => 11315061 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/315061
Semiconductor package device and method for fabricating the same Dec 21, 2005 Issued
Array ( [id] => 5807781 [patent_doc_number] => 20060094135 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-04 [patent_title] => 'Method of making semiconductor devices' [patent_app_type] => utility [patent_app_number] => 11/300481 [patent_app_country] => US [patent_app_date] => 2005-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2352 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20060094135.pdf [firstpage_image] =>[orig_patent_app_number] => 11300481 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/300481
Method of making semiconductor devices Dec 14, 2005 Issued
Array ( [id] => 393914 [patent_doc_number] => 07297607 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-20 [patent_title] => 'Device and method of performing a seasoning process for a semiconductor device manufacturing apparatus' [patent_app_type] => utility [patent_app_number] => 11/303891 [patent_app_country] => US [patent_app_date] => 2005-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2813 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/297/07297607.pdf [firstpage_image] =>[orig_patent_app_number] => 11303891 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/303891
Device and method of performing a seasoning process for a semiconductor device manufacturing apparatus Dec 14, 2005 Issued
Array ( [id] => 4971397 [patent_doc_number] => 20070111399 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-17 [patent_title] => 'Method of fabricating an exposed die package' [patent_app_type] => utility [patent_app_number] => 11/272962 [patent_app_country] => US [patent_app_date] => 2005-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1848 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0111/20070111399.pdf [firstpage_image] =>[orig_patent_app_number] => 11272962 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/272962
Method of fabricating an exposed die package Nov 13, 2005 Abandoned
Array ( [id] => 5678052 [patent_doc_number] => 20060183408 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-17 [patent_title] => 'Method for sequencing substrates' [patent_app_type] => utility [patent_app_number] => 11/271242 [patent_app_country] => US [patent_app_date] => 2005-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4501 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20060183408.pdf [firstpage_image] =>[orig_patent_app_number] => 11271242 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/271242
Method for sequencing substrates Nov 9, 2005 Issued
Array ( [id] => 907020 [patent_doc_number] => 07332374 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-19 [patent_title] => 'Prealignment and gapping for RF substrates' [patent_app_type] => utility [patent_app_number] => 11/270842 [patent_app_country] => US [patent_app_date] => 2005-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 20 [patent_no_of_words] => 4202 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/332/07332374.pdf [firstpage_image] =>[orig_patent_app_number] => 11270842 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/270842
Prealignment and gapping for RF substrates Nov 8, 2005 Issued
Array ( [id] => 4451099 [patent_doc_number] => 07964422 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-06-21 [patent_title] => 'Method and system for controlling a semiconductor fabrication process' [patent_app_type] => utility [patent_app_number] => 11/264122 [patent_app_country] => US [patent_app_date] => 2005-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3581 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/964/07964422.pdf [firstpage_image] =>[orig_patent_app_number] => 11264122 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/264122
Method and system for controlling a semiconductor fabrication process Oct 31, 2005 Issued
Menu