Search

Daniel A. Hess

Examiner (ID: 9166, Phone: (571)272-2392 , Office: P/2876 )

Most Active Art Unit
2876
Art Unit(s)
2876
Total Applications
2022
Issued Applications
1569
Pending Applications
141
Abandoned Applications
348

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 220932 [patent_doc_number] => 07608478 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-10-27 [patent_title] => 'On-chip igniter and method of manufacture' [patent_app_type] => utility [patent_app_number] => 11/261831 [patent_app_country] => US [patent_app_date] => 2005-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 6728 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/608/07608478.pdf [firstpage_image] =>[orig_patent_app_number] => 11261831 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/261831
On-chip igniter and method of manufacture Oct 27, 2005 Issued
Array ( [id] => 5037258 [patent_doc_number] => 20070089540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-26 [patent_title] => 'Method and apparatus to facilitate testing of printed semiconductor devices' [patent_app_type] => utility [patent_app_number] => 11/258747 [patent_app_country] => US [patent_app_date] => 2005-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4311 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20070089540.pdf [firstpage_image] =>[orig_patent_app_number] => 11258747 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/258747
Method and apparatus to facilitate testing of printed semiconductor devices Oct 25, 2005 Abandoned
Array ( [id] => 4428488 [patent_doc_number] => 07966879 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-28 [patent_title] => 'Fluid storage and dispensing system including dynamic fluid monitoring of fluid storage and dispensing vessel' [patent_app_type] => utility [patent_app_number] => 11/577864 [patent_app_country] => US [patent_app_date] => 2005-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 13735 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/966/07966879.pdf [firstpage_image] =>[orig_patent_app_number] => 11577864 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/577864
Fluid storage and dispensing system including dynamic fluid monitoring of fluid storage and dispensing vessel Oct 23, 2005 Issued
Array ( [id] => 452905 [patent_doc_number] => 07247516 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-07-24 [patent_title] => 'Method for fabricating a leadless chip carrier' [patent_app_type] => utility [patent_app_number] => 11/256511 [patent_app_country] => US [patent_app_date] => 2005-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6937 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/247/07247516.pdf [firstpage_image] =>[orig_patent_app_number] => 11256511 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/256511
Method for fabricating a leadless chip carrier Oct 20, 2005 Issued
Array ( [id] => 5796509 [patent_doc_number] => 20060033186 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-16 [patent_title] => 'Broken die detect sensor' [patent_app_type] => utility [patent_app_number] => 11/254131 [patent_app_country] => US [patent_app_date] => 2005-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2512 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20060033186.pdf [firstpage_image] =>[orig_patent_app_number] => 11254131 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/254131
Broken die detect sensor Oct 19, 2005 Issued
Array ( [id] => 195863 [patent_doc_number] => 07635641 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-22 [patent_title] => 'Integrated circuit support structures and their fabrication' [patent_app_type] => utility [patent_app_number] => 11/250421 [patent_app_country] => US [patent_app_date] => 2005-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 42 [patent_no_of_words] => 9999 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/635/07635641.pdf [firstpage_image] =>[orig_patent_app_number] => 11250421 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/250421
Integrated circuit support structures and their fabrication Oct 16, 2005 Issued
Array ( [id] => 5879451 [patent_doc_number] => 20060028649 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-09 [patent_title] => 'Multi beam scanning with bright/dark field imaging' [patent_app_type] => utility [patent_app_number] => 11/245166 [patent_app_country] => US [patent_app_date] => 2005-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 5906 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0028/20060028649.pdf [firstpage_image] =>[orig_patent_app_number] => 11245166 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/245166
Multi beam scanning with bright/dark field imaging Oct 6, 2005 Issued
Array ( [id] => 5715656 [patent_doc_number] => 20060079019 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-13 [patent_title] => 'Method for manufacturing wafer level chip scale package using redistribution substrate' [patent_app_type] => utility [patent_app_number] => 11/245962 [patent_app_country] => US [patent_app_date] => 2005-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 4191 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20060079019.pdf [firstpage_image] =>[orig_patent_app_number] => 11245962 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/245962
Method for manufacturing wafer level chip scale package using redistribution substrate Oct 6, 2005 Issued
Array ( [id] => 724511 [patent_doc_number] => 07045460 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-05-16 [patent_title] => 'Method for fabricating a packaging substrate' [patent_app_type] => utility [patent_app_number] => 11/162801 [patent_app_country] => US [patent_app_date] => 2005-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 2094 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/045/07045460.pdf [firstpage_image] =>[orig_patent_app_number] => 11162801 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/162801
Method for fabricating a packaging substrate Sep 22, 2005 Issued
Array ( [id] => 5107198 [patent_doc_number] => 20070066076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-22 [patent_title] => 'Substrate processing method and apparatus using a combustion flame' [patent_app_type] => utility [patent_app_number] => 11/230261 [patent_app_country] => US [patent_app_date] => 2005-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5384 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0066/20070066076.pdf [firstpage_image] =>[orig_patent_app_number] => 11230261 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/230261
Substrate processing method and apparatus using a combustion flame Sep 18, 2005 Abandoned
Array ( [id] => 5056928 [patent_doc_number] => 20070059850 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-15 [patent_title] => 'Method and system for derivation of breakdown voltage for MOS integrated circuit devices' [patent_app_type] => utility [patent_app_number] => 11/227012 [patent_app_country] => US [patent_app_date] => 2005-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7514 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20070059850.pdf [firstpage_image] =>[orig_patent_app_number] => 11227012 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/227012
Method and system for derivation of breakdown voltage for MOS integrated circuit devices Sep 13, 2005 Issued
Array ( [id] => 833404 [patent_doc_number] => 07396693 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-08 [patent_title] => 'Multiple point gate oxide integrity test method and system for the manufacture of semiconductor integrated circuits' [patent_app_type] => utility [patent_app_number] => 11/227182 [patent_app_country] => US [patent_app_date] => 2005-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 7504 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/396/07396693.pdf [firstpage_image] =>[orig_patent_app_number] => 11227182 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/227182
Multiple point gate oxide integrity test method and system for the manufacture of semiconductor integrated circuits Sep 13, 2005 Issued
Array ( [id] => 542137 [patent_doc_number] => 07166496 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-01-23 [patent_title] => 'Method of making a packaged semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/222651 [patent_app_country] => US [patent_app_date] => 2005-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 19 [patent_no_of_words] => 3615 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/166/07166496.pdf [firstpage_image] =>[orig_patent_app_number] => 11222651 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/222651
Method of making a packaged semiconductor device Sep 8, 2005 Issued
Array ( [id] => 5710539 [patent_doc_number] => 20060051884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-09 [patent_title] => 'Systems and methods for thin film thermal diagnostics with scanning thermal microstructures' [patent_app_type] => utility [patent_app_number] => 11/219141 [patent_app_country] => US [patent_app_date] => 2005-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4237 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20060051884.pdf [firstpage_image] =>[orig_patent_app_number] => 11219141 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/219141
Systems and methods for thin film thermal diagnostics with scanning thermal microstructures Aug 31, 2005 Issued
Array ( [id] => 267374 [patent_doc_number] => 07566900 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-28 [patent_title] => 'Integrated metrology tools for monitoring and controlling large area substrate processing chambers' [patent_app_type] => utility [patent_app_number] => 11/216801 [patent_app_country] => US [patent_app_date] => 2005-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 7529 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/566/07566900.pdf [firstpage_image] =>[orig_patent_app_number] => 11216801 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/216801
Integrated metrology tools for monitoring and controlling large area substrate processing chambers Aug 30, 2005 Issued
Array ( [id] => 5649077 [patent_doc_number] => 20060134812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-22 [patent_title] => 'Inspection methods for a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/213931 [patent_app_country] => US [patent_app_date] => 2005-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2211 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0134/20060134812.pdf [firstpage_image] =>[orig_patent_app_number] => 11213931 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/213931
Inspection methods for a semiconductor device Aug 29, 2005 Issued
Array ( [id] => 356244 [patent_doc_number] => 07488680 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-10 [patent_title] => 'Conductive through via process for electronic device carriers' [patent_app_type] => utility [patent_app_number] => 11/214602 [patent_app_country] => US [patent_app_date] => 2005-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 63 [patent_no_of_words] => 5688 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/488/07488680.pdf [firstpage_image] =>[orig_patent_app_number] => 11214602 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/214602
Conductive through via process for electronic device carriers Aug 29, 2005 Issued
Array ( [id] => 6977984 [patent_doc_number] => 20050287702 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-29 [patent_title] => 'Methods for designing carrier substrates with raised terminals' [patent_app_type] => utility [patent_app_number] => 11/215628 [patent_app_country] => US [patent_app_date] => 2005-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5595 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0287/20050287702.pdf [firstpage_image] =>[orig_patent_app_number] => 11215628 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/215628
Methods for designing carrier substrates with raised terminals Aug 28, 2005 Issued
Array ( [id] => 366520 [patent_doc_number] => 07479411 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-01-20 [patent_title] => 'Apparatus and method for forming solder seals for semiconductor flip chip packages' [patent_app_type] => utility [patent_app_number] => 11/213566 [patent_app_country] => US [patent_app_date] => 2005-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2209 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/479/07479411.pdf [firstpage_image] =>[orig_patent_app_number] => 11213566 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/213566
Apparatus and method for forming solder seals for semiconductor flip chip packages Aug 25, 2005 Issued
Array ( [id] => 5590970 [patent_doc_number] => 20060040422 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-23 [patent_title] => 'Microelectronic devices and methods for manufacturing and operating packaged microelectronic device' [patent_app_type] => utility [patent_app_number] => 11/206012 [patent_app_country] => US [patent_app_date] => 2005-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3926 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0040/20060040422.pdf [firstpage_image] =>[orig_patent_app_number] => 11206012 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/206012
Microelectronic devices and methods for manufacturing and operating packaged microelectronic device assemblies Aug 15, 2005 Issued
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