Search

Daniel C. Chappell

Examiner (ID: 18437, Phone: (571)272-5003 , Office: P/2135 )

Most Active Art Unit
2135
Art Unit(s)
2185, 2135
Total Applications
644
Issued Applications
493
Pending Applications
50
Abandoned Applications
116

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19005663 [patent_doc_number] => 20240069734 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => UTILIZING LAST SUCCESSFUL READ VOLTAGE LEVEL IN MEMORY ACCESS OPERATIONS [patent_app_type] => utility [patent_app_number] => 17/894540 [patent_app_country] => US [patent_app_date] => 2022-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8263 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17894540 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/894540
Utilizing last successful read voltage level in memory access operations Aug 23, 2022 Issued
Array ( [id] => 19152848 [patent_doc_number] => 11977759 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-07 [patent_title] => Method for operating a cache memory, cache memory and processing unit [patent_app_type] => utility [patent_app_number] => 17/892951 [patent_app_country] => US [patent_app_date] => 2022-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5423 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 631 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17892951 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/892951
Method for operating a cache memory, cache memory and processing unit Aug 21, 2022 Issued
Array ( [id] => 19340600 [patent_doc_number] => 12050790 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-30 [patent_title] => Optimizing memory for repeating patterns [patent_app_type] => utility [patent_app_number] => 17/888919 [patent_app_country] => US [patent_app_date] => 2022-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7938 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17888919 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/888919
Optimizing memory for repeating patterns Aug 15, 2022 Issued
Array ( [id] => 19652952 [patent_doc_number] => 12174738 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-24 [patent_title] => Circuitry and method [patent_app_type] => utility [patent_app_number] => 17/885780 [patent_app_country] => US [patent_app_date] => 2022-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5324 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17885780 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/885780
Circuitry and method Aug 10, 2022 Issued
Array ( [id] => 19459245 [patent_doc_number] => 12099737 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-24 [patent_title] => Temperature controlled zone creation and allocation [patent_app_type] => utility [patent_app_number] => 17/884478 [patent_app_country] => US [patent_app_date] => 2022-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7248 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17884478 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/884478
Temperature controlled zone creation and allocation Aug 8, 2022 Issued
Array ( [id] => 18038469 [patent_doc_number] => 20220382685 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => Method and Apparatus for Accessing Storage System [patent_app_type] => utility [patent_app_number] => 17/877190 [patent_app_country] => US [patent_app_date] => 2022-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13732 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17877190 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/877190
Method and apparatus for accessing storage system Jul 28, 2022 Issued
Array ( [id] => 19566696 [patent_doc_number] => 12141468 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-11-12 [patent_title] => Matrix transpose hardware acceleration [patent_app_type] => utility [patent_app_number] => 17/875805 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 18312 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17875805 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/875805
Matrix transpose hardware acceleration Jul 27, 2022 Issued
Array ( [id] => 18638000 [patent_doc_number] => 11762600 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Data processing method, apparatus, and system [patent_app_type] => utility [patent_app_number] => 17/872800 [patent_app_country] => US [patent_app_date] => 2022-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 4057 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17872800 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/872800
Data processing method, apparatus, and system Jul 24, 2022 Issued
Array ( [id] => 18925229 [patent_doc_number] => 20240028233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => DATA REDUCTION FOR STORAGE VOLUMES [patent_app_type] => utility [patent_app_number] => 17/814420 [patent_app_country] => US [patent_app_date] => 2022-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7949 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17814420 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/814420
Data reduction for storage volumes Jul 21, 2022 Issued
Array ( [id] => 19413698 [patent_doc_number] => 12079517 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-03 [patent_title] => Buffer allocation for reducing block transit penalty [patent_app_type] => utility [patent_app_number] => 17/870139 [patent_app_country] => US [patent_app_date] => 2022-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7867 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17870139 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/870139
Buffer allocation for reducing block transit penalty Jul 20, 2022 Issued
Array ( [id] => 19475896 [patent_doc_number] => 12105987 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-01 [patent_title] => Storage controller and electronic system [patent_app_type] => utility [patent_app_number] => 17/870096 [patent_app_country] => US [patent_app_date] => 2022-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 11145 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17870096 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/870096
Storage controller and electronic system Jul 20, 2022 Issued
Array ( [id] => 18925198 [patent_doc_number] => 20240028202 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => Optimizing Backend Workload Processing in a Storage System [patent_app_type] => utility [patent_app_number] => 17/869017 [patent_app_country] => US [patent_app_date] => 2022-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8113 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17869017 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/869017
Optimizing backend workload processing in a storage system Jul 19, 2022 Issued
Array ( [id] => 18181559 [patent_doc_number] => 20230042288 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => SUPPORTING SECURE MEMORY INTENT [patent_app_type] => utility [patent_app_number] => 17/867306 [patent_app_country] => US [patent_app_date] => 2022-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12878 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17867306 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/867306
Supporting secure memory intent Jul 17, 2022 Issued
Array ( [id] => 18904535 [patent_doc_number] => 20240020020 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => DYNAMIC BLOCK CATEGORIZATION TO IMPROVE RELIABILITY AND PERFORMANCE IN MEMORY SUB-SYSTEM [patent_app_type] => utility [patent_app_number] => 17/867204 [patent_app_country] => US [patent_app_date] => 2022-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8649 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17867204 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/867204
Dynamic block categorization to improve reliability and performance in memory sub-system Jul 17, 2022 Issued
Array ( [id] => 19369715 [patent_doc_number] => 12061800 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-13 [patent_title] => Method and apparatus for performing data access control of memory device with aid of predetermined command [patent_app_type] => utility [patent_app_number] => 17/862428 [patent_app_country] => US [patent_app_date] => 2022-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10724 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 330 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17862428 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/862428
Method and apparatus for performing data access control of memory device with aid of predetermined command Jul 11, 2022 Issued
Array ( [id] => 18438173 [patent_doc_number] => 20230185468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => INFORMATION PROCESSING DEVICE AND METHOD [patent_app_type] => utility [patent_app_number] => 17/840981 [patent_app_country] => US [patent_app_date] => 2022-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6847 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17840981 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/840981
INFORMATION PROCESSING DEVICE AND METHOD Jun 14, 2022 Abandoned
Array ( [id] => 18243991 [patent_doc_number] => 20230076302 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => COMPUTER-READABLE RECORDING MEDIUM HAVING STORED THEREIN CONTROL PROGRAM, INFORMATION PROCESSING APPARATUS, AND METHOD FOR CONTROLLING [patent_app_type] => utility [patent_app_number] => 17/830390 [patent_app_country] => US [patent_app_date] => 2022-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8712 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17830390 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/830390
COMPUTER-READABLE RECORDING MEDIUM HAVING STORED THEREIN CONTROL PROGRAM, INFORMATION PROCESSING APPARATUS, AND METHOD FOR CONTROLLING Jun 1, 2022 Abandoned
Array ( [id] => 18038267 [patent_doc_number] => 20220382483 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/746437 [patent_app_country] => US [patent_app_date] => 2022-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4412 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17746437 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/746437
SEMICONDUCTOR DEVICE May 16, 2022 Abandoned
Array ( [id] => 19243630 [patent_doc_number] => 12014073 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-18 [patent_title] => Techniques for sequential access operations [patent_app_type] => utility [patent_app_number] => 17/663797 [patent_app_country] => US [patent_app_date] => 2022-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 19235 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17663797 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/663797
Techniques for sequential access operations May 16, 2022 Issued
Array ( [id] => 18006960 [patent_doc_number] => 20220365726 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => NEAR MEMORY PROCESSING DUAL IN-LINE MEMORY MODULE AND METHOD FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/746562 [patent_app_country] => US [patent_app_date] => 2022-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6820 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17746562 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/746562
Near memory processing dual in-line memory module and method for operating the same May 16, 2022 Issued
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